forked from OSchip/llvm-project
[LV] Add a new reduction pattern match
Adding a new reduction pattern match for vectorizing code similar to TSVC s3111:
for (int i = 0; i < N; i++)
if (a[i] > b)
sum += a[i];
This patch adds support for fadd, fsub and fmull, as well as multiple
branches and different (but compatible) instructions (ex. add+sub) in
different branches.
I have forwarded to trunk, added fsub and fmul functionality and
additional tests, but the credit goes to Takahiro, who did most of the
actual work.
Differential Revision: https://reviews.llvm.org/D49168
Patch by Takahiro Miyoshi <takahiro.miyoshi@linaro.org>.
llvm-svn: 344172
This commit is contained in:
Renato Golin
parent
2e76cab47f
commit
cb19c8e3aa
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@ -140,7 +140,8 @@ public:
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/// Returns true if instruction I has multiple uses in Insts
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static bool hasMultipleUsesOf(Instruction *I,
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SmallPtrSetImpl<Instruction *> &Insts);
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SmallPtrSetImpl<Instruction *> &Insts,
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unsigned MaxNumUses);
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/// Returns true if all uses of the instruction I is within the Set.
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static bool areAllUsesIn(Instruction *I, SmallPtrSetImpl<Instruction *> &Set);
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@ -150,6 +151,10 @@ public:
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/// or max(X, Y).
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static InstDesc isMinMaxSelectCmpPattern(Instruction *I, InstDesc &Prev);
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/// Returns a struct describing if the instruction is a
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/// Select(FCmp(X, Y), (Z = X op PHINode), PHINode) instruction pattern.
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static InstDesc isConditionalRdxPattern(RecurrenceKind Kind, Instruction *I);
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/// Returns identity corresponding to the RecurrenceKind.
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static Constant *getRecurrenceIdentity(RecurrenceKind K, Type *Tp);
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@ -299,9 +299,17 @@ bool RecurrenceDescriptor::AddReductionVar(PHINode *Phi, RecurrenceKind Kind,
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return false;
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}
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bool IsASelect = isa<SelectInst>(Cur);
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// A conditional reduction operation must only have 2 or less uses in
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// VisitedInsts.
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if (IsASelect && (Kind == RK_FloatAdd || Kind == RK_FloatMult) &&
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hasMultipleUsesOf(Cur, VisitedInsts, 2))
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return false;
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// A reduction operation must only have one use of the reduction value.
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if (!IsAPhi && Kind != RK_IntegerMinMax && Kind != RK_FloatMinMax &&
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hasMultipleUsesOf(Cur, VisitedInsts))
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if (!IsAPhi && !IsASelect && Kind != RK_IntegerMinMax &&
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Kind != RK_FloatMinMax && hasMultipleUsesOf(Cur, VisitedInsts, 1))
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return false;
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// All inputs to a PHI node must be a reduction value.
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@ -362,7 +370,8 @@ bool RecurrenceDescriptor::AddReductionVar(PHINode *Phi, RecurrenceKind Kind,
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} else if (!isa<PHINode>(UI) &&
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((!isa<FCmpInst>(UI) && !isa<ICmpInst>(UI) &&
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!isa<SelectInst>(UI)) ||
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!isMinMaxSelectCmpPattern(UI, IgnoredVal).isRecurrence()))
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(!isConditionalRdxPattern(Kind, UI).isRecurrence() &&
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!isMinMaxSelectCmpPattern(UI, IgnoredVal).isRecurrence())))
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return false;
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// Remember that we completed the cycle.
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@ -491,6 +500,52 @@ RecurrenceDescriptor::isMinMaxSelectCmpPattern(Instruction *I, InstDesc &Prev) {
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return InstDesc(false, I);
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}
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/// Returns true if the select instruction has users in the compare-and-add
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/// reduction pattern below. The select instruction argument is the last one
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/// in the sequence.
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///
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/// %sum.1 = phi ...
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/// ...
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/// %cmp = fcmp pred %0, %CFP
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/// %add = fadd %0, %sum.1
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/// %sum.2 = select %cmp, %add, %sum.1
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RecurrenceDescriptor::InstDesc
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RecurrenceDescriptor::isConditionalRdxPattern(
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RecurrenceKind Kind, Instruction *I) {
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SelectInst *SI = dyn_cast<SelectInst>(I);
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if (!SI)
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return InstDesc(false, I);
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CmpInst *CI = dyn_cast<CmpInst>(SI->getCondition());
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// Only handle single use cases for now.
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if (!CI || !CI->hasOneUse())
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return InstDesc(false, I);
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Value *TrueVal = SI->getTrueValue();
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Value *FalseVal = SI->getFalseValue();
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// Handle only when either of operands of select instruction is a PHI
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// node for now.
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if ((isa<PHINode>(*TrueVal) && isa<PHINode>(*FalseVal)) ||
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(!isa<PHINode>(*TrueVal) && !isa<PHINode>(*FalseVal)))
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return InstDesc(false, I);
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Instruction *I1 =
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isa<PHINode>(*TrueVal) ? dyn_cast<Instruction>(FalseVal)
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: dyn_cast<Instruction>(TrueVal);
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if (!I1 || !I1->isBinaryOp())
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return InstDesc(false, I);
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Value *Op1, *Op2;
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if (m_FAdd(m_Value(Op1), m_Value(Op2)).match(I1) ||
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m_FSub(m_Value(Op1), m_Value(Op2)).match(I1))
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return InstDesc(Kind == RK_FloatAdd, SI);
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if (m_FMul(m_Value(Op1), m_Value(Op2)).match(I1))
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return InstDesc(Kind == RK_FloatMult, SI);
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return InstDesc(false, I);
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}
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RecurrenceDescriptor::InstDesc
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RecurrenceDescriptor::isRecurrenceInstr(Instruction *I, RecurrenceKind Kind,
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InstDesc &Prev, bool HasFunNoNaNAttr) {
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@ -520,9 +575,12 @@ RecurrenceDescriptor::isRecurrenceInstr(Instruction *I, RecurrenceKind Kind,
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case Instruction::FSub:
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case Instruction::FAdd:
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return InstDesc(Kind == RK_FloatAdd, I, UAI);
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case Instruction::Select:
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if (Kind == RK_FloatAdd || Kind == RK_FloatMult)
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return isConditionalRdxPattern(Kind, I);
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LLVM_FALLTHROUGH;
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case Instruction::FCmp:
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case Instruction::ICmp:
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case Instruction::Select:
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if (Kind != RK_IntegerMinMax &&
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(!HasFunNoNaNAttr || Kind != RK_FloatMinMax))
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return InstDesc(false, I);
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@ -531,13 +589,14 @@ RecurrenceDescriptor::isRecurrenceInstr(Instruction *I, RecurrenceKind Kind,
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}
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bool RecurrenceDescriptor::hasMultipleUsesOf(
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Instruction *I, SmallPtrSetImpl<Instruction *> &Insts) {
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Instruction *I, SmallPtrSetImpl<Instruction *> &Insts,
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unsigned MaxNumUses) {
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unsigned NumUses = 0;
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for (User::op_iterator Use = I->op_begin(), E = I->op_end(); Use != E;
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++Use) {
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if (Insts.count(dyn_cast<Instruction>(*Use)))
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++NumUses;
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if (NumUses > 1)
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if (NumUses > MaxNumUses)
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return true;
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}
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@ -0,0 +1,666 @@
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; RUN: opt -S -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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; Float pattern:
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; Check vectorization of reduction code which has an fadd instruction after
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; an fcmp instruction which compares an array element and 0.
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;
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; float fcmp_0_fadd_select1(float * restrict x, const int N) {
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; float sum = 0.
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; for (int i = 0; i < N; ++i)
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; if (x[i] > (float)0.)
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; sum += x[i];
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; return sum;
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; }
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; CHECK-LABEL: @fcmp_0_fadd_select1(
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; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x float> %[[V0:.*]], zeroinitializer
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; CHECK: %[[V3:.*]] = fadd fast <4 x float> %[[V0]], %[[V2:.*]]
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; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]
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define float @fcmp_0_fadd_select1(float* noalias %x, i32 %N) nounwind readonly {
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entry:
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%cmp.1 = icmp sgt i32 %N, 0
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br i1 %cmp.1, label %for.header, label %for.end
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for.header: ; preds = %entry
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%zext = zext i32 %N to i64
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br label %for.body
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for.body: ; preds = %header, %for.body
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%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
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%sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
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%arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv
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%0 = load float, float* %arrayidx, align 4
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%cmp.2 = fcmp fast ogt float %0, 0.000000e+00
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%add = fadd fast float %0, %sum.1
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%sum.2 = select i1 %cmp.2, float %add, float %sum.1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %zext
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
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ret float %1
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}
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; Double pattern:
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; Check vectorization of reduction code which has an fadd instruction after
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; an fcmp instruction which compares an array element and 0.
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;
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; double fcmp_0_fadd_select2(double * restrict x, const int N) {
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; double sum = 0.
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; for (int i = 0; i < N; ++i)
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; if (x[i] > 0.)
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; sum += x[i];
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; return sum;
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; }
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; CHECK-LABEL: @fcmp_0_fadd_select2(
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; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x double> %[[V0:.*]], zeroinitializer
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; CHECK: %[[V3:.*]] = fadd fast <4 x double> %[[V0]], %[[V2:.*]]
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; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]
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define double @fcmp_0_fadd_select2(double* noalias %x, i32 %N) nounwind readonly {
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entry:
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%cmp.1 = icmp sgt i32 %N, 0
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br i1 %cmp.1, label %for.header, label %for.end
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for.header: ; preds = %entry
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%zext = zext i32 %N to i64
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br label %for.body
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for.body: ; preds = %header, %for.body
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%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
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%sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
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%arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv
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%0 = load double, double* %arrayidx, align 4
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%cmp.2 = fcmp fast ogt double %0, 0.000000e+00
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%add = fadd fast double %0, %sum.1
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%sum.2 = select i1 %cmp.2, double %add, double %sum.1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %zext
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
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ret double %1
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}
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; Float pattern:
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; Check vectorization of reduction code which has an fadd instruction after
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; an fcmp instruction which compares an array element and a floating-point
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; value.
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;
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; float fcmp_val_fadd_select1(float * restrict x, float y, const int N) {
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; float sum = 0.
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; for (int i = 0; i < N; ++i)
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; if (x[i] > y)
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; sum += x[i];
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; return sum;
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; }
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; CHECK-LABEL: @fcmp_val_fadd_select1(
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; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x float> %[[V0:.*]], %broadcast.splat2
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; CHECK: %[[V3:.*]] = fadd fast <4 x float> %[[V0]], %[[V2:.*]]
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; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]
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define float @fcmp_val_fadd_select1(float* noalias %x, float %y, i32 %N) nounwind readonly {
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entry:
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%cmp.1 = icmp sgt i32 %N, 0
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br i1 %cmp.1, label %for.header, label %for.end
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for.header: ; preds = %entry
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%zext = zext i32 %N to i64
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br label %for.body
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for.body: ; preds = %header, %for.body
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%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
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%sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
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%arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv
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%0 = load float, float* %arrayidx, align 4
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%cmp.2 = fcmp fast ogt float %0, %y
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%add = fadd fast float %0, %sum.1
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%sum.2 = select i1 %cmp.2, float %add, float %sum.1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %zext
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
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ret float %1
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}
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; Double pattern:
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; Check vectorization of reduction code which has an fadd instruction after
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; an fcmp instruction which compares an array element and a floating-point
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; value.
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;
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; double fcmp_val_fadd_select2(double * restrict x, double y, const int N) {
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; double sum = 0.
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; for (int i = 0; i < N; ++i)
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; if (x[i] > y)
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; sum += x[i];
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; return sum;
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; }
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; CHECK-LABEL: @fcmp_val_fadd_select2(
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; CHECK: %[[V1:.*]] = fcmp fast ogt <4 x double> %[[V0:.*]], %broadcast.splat2
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; CHECK: %[[V3:.*]] = fadd fast <4 x double> %[[V0]], %[[V2:.*]]
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; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]
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define double @fcmp_val_fadd_select2(double* noalias %x, double %y, i32 %N) nounwind readonly {
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entry:
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%cmp.1 = icmp sgt i32 %N, 0
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br i1 %cmp.1, label %for.header, label %for.end
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for.header: ; preds = %entry
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%zext = zext i32 %N to i64
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br label %for.body
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for.body: ; preds = %header, %for.body
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%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
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%sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
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%arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv
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%0 = load double, double* %arrayidx, align 4
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%cmp.2 = fcmp fast ogt double %0, %y
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%add = fadd fast double %0, %sum.1
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%sum.2 = select i1 %cmp.2, double %add, double %sum.1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %zext
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
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ret double %1
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}
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; Float pattern:
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; Check vectorization of reduction code which has an fadd instruction after
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; an fcmp instruction which compares an array element and another array
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; element.
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;
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; float fcmp_array_elm_fadd_select1(float * restrict x, float * restrict y,
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; const int N) {
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; float sum = 0.
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; for (int i = 0; i < N; ++i)
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; if (x[i] > y[i])
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; sum += x[i];
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; return sum;
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; }
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; CHECK-LABEL: @fcmp_array_elm_fadd_select1(
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; CHECK: %[[V2:.*]] = fcmp fast ogt <4 x float> %[[V0:.*]], %[[V1:.*]]
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; CHECK: %[[V4:.*]] = fadd fast <4 x float> %[[V0]], %[[V3:.*]]
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; CHECK: select <4 x i1> %[[V2]], <4 x float> %[[V4]], <4 x float> %[[V3]]
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define float @fcmp_array_elm_fadd_select1(float* noalias %x, float* noalias %y, i32 %N) nounwind readonly {
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entry:
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%cmp.1 = icmp sgt i32 %N, 0
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br i1 %cmp.1, label %for.header, label %for.end
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for.header: ; preds = %entry
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%zext = zext i32 %N to i64
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br label %for.body
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for.body: ; preds = %for.body, %for.header
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%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
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%sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
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%arrayidx.1 = getelementptr inbounds float, float* %x, i64 %indvars.iv
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%0 = load float, float* %arrayidx.1, align 4
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%arrayidx.2 = getelementptr inbounds float, float* %y, i64 %indvars.iv
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%1 = load float, float* %arrayidx.2, align 4
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%cmp.2 = fcmp fast ogt float %0, %1
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%add = fadd fast float %0, %sum.1
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%sum.2 = select i1 %cmp.2, float %add, float %sum.1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %zext
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%2 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
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ret float %2
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}
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; Double pattern:
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; Check vectorization of reduction code which has an fadd instruction after
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; an fcmp instruction which compares an array element and another array
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; element.
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;
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; double fcmp_array_elm_fadd_select2(double * restrict x, double * restrict y,
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; const int N) {
|
||||
; double sum = 0.
|
||||
; for (int i = 0; i < N; ++i)
|
||||
; if (x[i] > y[i])
|
||||
; sum += x[i];
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_array_elm_fadd_select2(
|
||||
; CHECK: %[[V2:.*]] = fcmp fast ogt <4 x double> %[[V0:.*]], %[[V1:.*]]
|
||||
; CHECK: %[[V4:.*]] = fadd fast <4 x double> %[[V0]], %[[V3:.*]]
|
||||
; CHECK: select <4 x i1> %[[V2]], <4 x double> %[[V4]], <4 x double> %[[V3]]
|
||||
define double @fcmp_array_elm_fadd_select2(double* noalias %x, double* noalias %y, i32 %N) nounwind readonly {
|
||||
entry:
|
||||
%cmp.1 = icmp sgt i32 %N, 0
|
||||
br i1 %cmp.1, label %for.header, label %for.end
|
||||
|
||||
for.header: ; preds = %entry
|
||||
%zext = zext i32 %N to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %for.header
|
||||
%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
|
||||
%sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
|
||||
%arrayidx.1 = getelementptr inbounds double, double* %x, i64 %indvars.iv
|
||||
%0 = load double, double* %arrayidx.1, align 4
|
||||
%arrayidx.2 = getelementptr inbounds double, double* %y, i64 %indvars.iv
|
||||
%1 = load double, double* %arrayidx.2, align 4
|
||||
%cmp.2 = fcmp fast ogt double %0, %1
|
||||
%add = fadd fast double %0, %sum.1
|
||||
%sum.2 = select i1 %cmp.2, double %add, double %sum.1
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %zext
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.body, %entry
|
||||
%2 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
|
||||
ret double %2
|
||||
}
|
||||
|
||||
; Float pattern:
|
||||
; Check vectorization of reduction code which has an fsub instruction after
|
||||
; an fcmp instruction which compares an array element and 0.
|
||||
;
|
||||
; float fcmp_0_fsub_select1(float * restrict x, const int N) {
|
||||
; float sum = 0.
|
||||
; for (int i = 0; i < N; ++i)
|
||||
; if (x[i] > (float)0.)
|
||||
; sum -= x[i];
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_0_fsub_select1(
|
||||
; CHECK: %[[V1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], zeroinitializer
|
||||
; CHECK: %[[V3:.*]] = fsub <4 x float> %[[V2:.*]], %[[V0]]
|
||||
; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]
|
||||
define float @fcmp_0_fsub_select1(float* noalias %x, i32 %N) nounwind readonly {
|
||||
entry:
|
||||
%cmp.1 = icmp sgt i32 %N, 0
|
||||
br i1 %cmp.1, label %for.header, label %for.end
|
||||
|
||||
for.header: ; preds = %entry
|
||||
%zext = zext i32 %N to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %for.header
|
||||
%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
|
||||
%sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
|
||||
%arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv
|
||||
%0 = load float, float* %arrayidx, align 4
|
||||
%cmp.2 = fcmp ogt float %0, 0.000000e+00
|
||||
%sub = fsub float %sum.1, %0
|
||||
%sum.2 = select i1 %cmp.2, float %sub, float %sum.1
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %zext
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.body, %entry
|
||||
%1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
|
||||
ret float %1
|
||||
}
|
||||
|
||||
; Double pattern:
|
||||
; Check vectorization of reduction code which has an fsub instruction after
|
||||
; an fcmp instruction which compares an array element and 0.
|
||||
;
|
||||
; double fcmp_0_fsub_select2(double * restrict x, const int N) {
|
||||
; double sum = 0.
|
||||
; for (int i = 0; i < N; ++i)
|
||||
; if (x[i] > 0.)
|
||||
; sum -= x[i];
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_0_fsub_select2(
|
||||
; CHECK: %[[V1:.*]] = fcmp ogt <4 x double> %[[V0:.*]], zeroinitializer
|
||||
; CHECK: %[[V3:.*]] = fsub <4 x double> %[[V2:.*]], %[[V0]]
|
||||
; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]
|
||||
define double @fcmp_0_fsub_select2(double* noalias %x, i32 %N) nounwind readonly {
|
||||
entry:
|
||||
%cmp.1 = icmp sgt i32 %N, 0
|
||||
br i1 %cmp.1, label %for.header, label %for.end
|
||||
|
||||
for.header: ; preds = %entry
|
||||
%zext = zext i32 %N to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %for.header
|
||||
%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
|
||||
%sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
|
||||
%arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv
|
||||
%0 = load double, double* %arrayidx, align 4
|
||||
%cmp.2 = fcmp ogt double %0, 0.000000e+00
|
||||
%sub = fsub double %sum.1, %0
|
||||
%sum.2 = select i1 %cmp.2, double %sub, double %sum.1
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %zext
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.body, %entry
|
||||
%1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
|
||||
ret double %1
|
||||
}
|
||||
|
||||
; Float pattern:
|
||||
; Check vectorization of reduction code which has an fmul instruction after
|
||||
; an fcmp instruction which compares an array element and 0.
|
||||
;
|
||||
; float fcmp_0_fmult_select1(float * restrict x, const int N) {
|
||||
; float sum = 0.
|
||||
; for (int i = 0; i < N; ++i)
|
||||
; if (x[i] > (float)0.)
|
||||
; sum *= x[i];
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_0_fmult_select1(
|
||||
; CHECK: %[[V1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], zeroinitializer
|
||||
; CHECK: %[[V3:.*]] = fmul <4 x float> %[[V2:.*]], %[[V0]]
|
||||
; CHECK: select <4 x i1> %[[V1]], <4 x float> %[[V3]], <4 x float> %[[V2]]
|
||||
define float @fcmp_0_fmult_select1(float* noalias %x, i32 %N) nounwind readonly {
|
||||
entry:
|
||||
%cmp.1 = icmp sgt i32 %N, 0
|
||||
br i1 %cmp.1, label %for.header, label %for.end
|
||||
|
||||
for.header: ; preds = %entry
|
||||
%zext = zext i32 %N to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %for.header
|
||||
%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
|
||||
%sum.1 = phi float [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
|
||||
%arrayidx = getelementptr inbounds float, float* %x, i64 %indvars.iv
|
||||
%0 = load float, float* %arrayidx, align 4
|
||||
%cmp.2 = fcmp ogt float %0, 0.000000e+00
|
||||
%mult = fmul float %sum.1, %0
|
||||
%sum.2 = select i1 %cmp.2, float %mult, float %sum.1
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %zext
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.body, %entry
|
||||
%1 = phi float [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
|
||||
ret float %1
|
||||
}
|
||||
|
||||
; Double pattern:
|
||||
; Check vectorization of reduction code which has an fmul instruction after
|
||||
; an fcmp instruction which compares an array element and 0.
|
||||
;
|
||||
; double fcmp_0_fmult_select2(double * restrict x, const int N) {
|
||||
; double sum = 0.
|
||||
; for (int i = 0; i < N; ++i)
|
||||
; if (x[i] > 0.)
|
||||
; sum *= x[i];
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_0_fmult_select2(
|
||||
; CHECK: %[[V1:.*]] = fcmp ogt <4 x double> %[[V0:.*]], zeroinitializer
|
||||
; CHECK: %[[V3:.*]] = fmul <4 x double> %[[V2:.*]], %[[V0]]
|
||||
; CHECK: select <4 x i1> %[[V1]], <4 x double> %[[V3]], <4 x double> %[[V2]]
|
||||
define double @fcmp_0_fmult_select2(double* noalias %x, i32 %N) nounwind readonly {
|
||||
entry:
|
||||
%cmp.1 = icmp sgt i32 %N, 0
|
||||
br i1 %cmp.1, label %for.header, label %for.end
|
||||
|
||||
for.header: ; preds = %entry
|
||||
%zext = zext i32 %N to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %for.header
|
||||
%indvars.iv = phi i64 [ 0, %for.header ], [ %indvars.iv.next, %for.body ]
|
||||
%sum.1 = phi double [ 0.000000e+00, %for.header ], [ %sum.2, %for.body ]
|
||||
%arrayidx = getelementptr inbounds double, double* %x, i64 %indvars.iv
|
||||
%0 = load double, double* %arrayidx, align 4
|
||||
%cmp.2 = fcmp ogt double %0, 0.000000e+00
|
||||
%mult = fmul double %sum.1, %0
|
||||
%sum.2 = select i1 %cmp.2, double %mult, double %sum.1
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %zext
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.body, %entry
|
||||
%1 = phi double [ 0.000000e+00, %entry ], [ %sum.2, %for.body ]
|
||||
ret double %1
|
||||
}
|
||||
|
||||
; Float multi pattern
|
||||
; Check vectorisation of reduction code with a pair of selects to different
|
||||
; fadd patterns.
|
||||
;
|
||||
; float fcmp_multi(float *a, int n) {
|
||||
; float sum=0.0;
|
||||
; for (int i=0;i<n;i++) {
|
||||
; if (a[i]>1.0)
|
||||
; sum+=a[i];
|
||||
; else if (a[i]<3.0)
|
||||
; sum+=2*a[i];
|
||||
; else
|
||||
; sum+=3*a[i];
|
||||
; }
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_multi(
|
||||
; CHECK: %[[C1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], <float 1.000000e+00,
|
||||
; CHECK: %[[C2:.*]] = fcmp olt <4 x float> %[[V0]], <float 3.000000e+00,
|
||||
; CHECK-DAG: %[[M1:.*]] = fmul fast <4 x float> %[[V0]], <float 3.000000e+00,
|
||||
; CHECK-DAG: %[[M2:.*]] = fmul fast <4 x float> %[[V0]], <float 2.000000e+00,
|
||||
; CHECK: %[[C11:.*]] = xor <4 x i1> %[[C1]], <i1 true,
|
||||
; CHECK-DAG: %[[C12:.*]] = and <4 x i1> %[[C2]], %[[C11]]
|
||||
; CHECK-DAG: %[[C21:.*]] = xor <4 x i1> %[[C2]], <i1 true,
|
||||
; CHECK: %[[C22:.*]] = and <4 x i1> %[[C21]], %[[C11]]
|
||||
; CHECK: %[[S1:.*]] = select <4 x i1> %[[C22]], <4 x float> %[[M1]], <4 x float> %[[M2]]
|
||||
; CHECK: %[[S2:.*]] = select <4 x i1> %[[C1]], <4 x float> %[[V0]], <4 x float> %[[S1]]
|
||||
; CHECK: fadd fast <4 x float> %[[S2]],
|
||||
define float @fcmp_multi(float* nocapture readonly %a, i32 %n) nounwind readonly {
|
||||
entry:
|
||||
%cmp10 = icmp sgt i32 %n, 0
|
||||
br i1 %cmp10, label %for.body.preheader, label %for.end
|
||||
|
||||
for.body.preheader: ; preds = %entry
|
||||
%wide.trip.count = zext i32 %n to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.inc, %for.body.preheader
|
||||
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.inc ]
|
||||
%sum.011 = phi float [ 0.000000e+00, %for.body.preheader ], [ %sum.1, %for.inc ]
|
||||
%arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv
|
||||
%0 = load float, float* %arrayidx, align 4
|
||||
%cmp1 = fcmp ogt float %0, 1.000000e+00
|
||||
br i1 %cmp1, label %for.inc, label %if.else
|
||||
|
||||
if.else: ; preds = %for.body
|
||||
%cmp8 = fcmp olt float %0, 3.000000e+00
|
||||
br i1 %cmp8, label %if.then10, label %if.else14
|
||||
|
||||
if.then10: ; preds = %if.else
|
||||
%mul = fmul fast float %0, 2.000000e+00
|
||||
br label %for.inc
|
||||
|
||||
if.else14: ; preds = %if.else
|
||||
%mul17 = fmul fast float %0, 3.000000e+00
|
||||
br label %for.inc
|
||||
|
||||
for.inc: ; preds = %for.body, %if.else14, %if.then10
|
||||
%.pn = phi float [ %mul, %if.then10 ], [ %mul17, %if.else14 ], [ %0, %for.body ]
|
||||
%sum.1 = fadd fast float %.pn, %sum.011
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.inc, %entry
|
||||
%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %sum.1, %for.inc ]
|
||||
ret float %sum.0.lcssa
|
||||
}
|
||||
|
||||
; Float fadd + fsub patterns
|
||||
; Check vectorisation of reduction code with a pair of selects to different
|
||||
; instructions { fadd, fsub } but equivalent (change in constant).
|
||||
;
|
||||
; float fcmp_multi(float *a, int n) {
|
||||
; float sum=0.0;
|
||||
; for (int i=0;i<n;i++) {
|
||||
; if (a[i]>1.0)
|
||||
; sum+=a[i];
|
||||
; else if (a[i]<3.0)
|
||||
; sum-=a[i];
|
||||
; }
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_fadd_fsub(
|
||||
; CHECK: %[[C1:.*]] = fcmp ogt <4 x float> %[[V0:.*]], <float 1.000000e+00,
|
||||
; CHECK: %[[C2:.*]] = fcmp olt <4 x float> %[[V0]], <float 3.000000e+00,
|
||||
; CHECK-DAG: %[[SUB:.*]] = fsub fast <4 x float>
|
||||
; CHECK-DAG: %[[ADD:.*]] = fadd fast <4 x float>
|
||||
; CHECK: %[[C11:.*]] = xor <4 x i1> %[[C1]], <i1 true,
|
||||
; CHECK-DAG: %[[C12:.*]] = and <4 x i1> %[[C2]], %[[C11]]
|
||||
; CHECK-DAG: %[[C21:.*]] = xor <4 x i1> %[[C2]], <i1 true,
|
||||
; CHECK: %[[C22:.*]] = and <4 x i1> %[[C21]], %[[C11]]
|
||||
; CHECK: %[[S1:.*]] = select <4 x i1> %[[C12]], <4 x float> %[[SUB]], <4 x float> %[[ADD]]
|
||||
; CHECK: %[[S2:.*]] = select <4 x i1> %[[C22]], {{.*}} <4 x float> %[[S1]]
|
||||
define float @fcmp_fadd_fsub(float* nocapture readonly %a, i32 %n) nounwind readonly {
|
||||
entry:
|
||||
%cmp9 = icmp sgt i32 %n, 0
|
||||
br i1 %cmp9, label %for.body.preheader, label %for.end
|
||||
|
||||
for.body.preheader: ; preds = %entry
|
||||
%wide.trip.count = zext i32 %n to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.inc, %for.body.preheader
|
||||
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.inc ]
|
||||
%sum.010 = phi float [ 0.000000e+00, %for.body.preheader ], [ %sum.1, %for.inc ]
|
||||
%arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv
|
||||
%0 = load float, float* %arrayidx, align 4
|
||||
%cmp1 = fcmp ogt float %0, 1.000000e+00
|
||||
br i1 %cmp1, label %if.then, label %if.else
|
||||
|
||||
if.then: ; preds = %for.body
|
||||
%add = fadd fast float %0, %sum.010
|
||||
br label %for.inc
|
||||
|
||||
if.else: ; preds = %for.body
|
||||
%cmp8 = fcmp olt float %0, 3.000000e+00
|
||||
br i1 %cmp8, label %if.then10, label %for.inc
|
||||
|
||||
if.then10: ; preds = %if.else
|
||||
%sub = fsub fast float %sum.010, %0
|
||||
br label %for.inc
|
||||
|
||||
for.inc: ; preds = %if.then, %if.then10, %if.else
|
||||
%sum.1 = phi float [ %add, %if.then ], [ %sub, %if.then10 ], [ %sum.010, %if.else ]
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.inc, %entry
|
||||
%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %sum.1, %for.inc ]
|
||||
ret float %sum.0.lcssa
|
||||
}
|
||||
|
||||
; Float fadd + fmul patterns
|
||||
; Check lack of vectorisation of reduction code with a pair of non-compatible
|
||||
; instructions { fadd, fmul }.
|
||||
;
|
||||
; float fcmp_multi(float *a, int n) {
|
||||
; float sum=0.0;
|
||||
; for (int i=0;i<n;i++) {
|
||||
; if (a[i]>1.0)
|
||||
; sum+=a[i];
|
||||
; else if (a[i]<3.0)
|
||||
; sum*=a[i];
|
||||
; }
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_fadd_fmul(
|
||||
; CHECK-NOT: <4 x float>
|
||||
define float @fcmp_fadd_fmul(float* nocapture readonly %a, i32 %n) nounwind readonly {
|
||||
entry:
|
||||
%cmp9 = icmp sgt i32 %n, 0
|
||||
br i1 %cmp9, label %for.body.preheader, label %for.end
|
||||
|
||||
for.body.preheader: ; preds = %entry
|
||||
%wide.trip.count = zext i32 %n to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.inc, %for.body.preheader
|
||||
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.inc ]
|
||||
%sum.010 = phi float [ 0.000000e+00, %for.body.preheader ], [ %sum.1, %for.inc ]
|
||||
%arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv
|
||||
%0 = load float, float* %arrayidx, align 4
|
||||
%cmp1 = fcmp ogt float %0, 1.000000e+00
|
||||
br i1 %cmp1, label %if.then, label %if.else
|
||||
|
||||
if.then: ; preds = %for.body
|
||||
%add = fadd fast float %0, %sum.010
|
||||
br label %for.inc
|
||||
|
||||
if.else: ; preds = %for.body
|
||||
%cmp8 = fcmp olt float %0, 3.000000e+00
|
||||
br i1 %cmp8, label %if.then10, label %for.inc
|
||||
|
||||
if.then10: ; preds = %if.else
|
||||
%mul = fmul fast float %0, %sum.010
|
||||
br label %for.inc
|
||||
|
||||
for.inc: ; preds = %if.then, %if.then10, %if.else
|
||||
%sum.1 = phi float [ %add, %if.then ], [ %mul, %if.then10 ], [ %sum.010, %if.else ]
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.inc, %entry
|
||||
%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %sum.1, %for.inc ]
|
||||
ret float %sum.0.lcssa
|
||||
}
|
||||
|
||||
; Float fadd + store patterns
|
||||
; Check lack of vectorisation of reduction code with a store back, given it
|
||||
; has loop dependency on a[i].
|
||||
;
|
||||
; float fcmp_store_back(float a[], int LEN) {
|
||||
; float sum = 0.0;
|
||||
; for (int i = 0; i < LEN; i++) {
|
||||
; sum += a[i];
|
||||
; a[i] = sum;
|
||||
; }
|
||||
; return sum;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: @fcmp_store_back(
|
||||
; CHECK-NOT: <4 x float>
|
||||
define float @fcmp_store_back(float* nocapture %a, i32 %LEN) nounwind readonly {
|
||||
entry:
|
||||
%cmp7 = icmp sgt i32 %LEN, 0
|
||||
br i1 %cmp7, label %for.body.preheader, label %for.end
|
||||
|
||||
for.body.preheader: ; preds = %entry
|
||||
%wide.trip.count = zext i32 %LEN to i64
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %for.body.preheader
|
||||
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
|
||||
%sum.08 = phi float [ 0.000000e+00, %for.body.preheader ], [ %add, %for.body ]
|
||||
%arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv
|
||||
%0 = load float, float* %arrayidx, align 4
|
||||
%add = fadd fast float %0, %sum.08
|
||||
store float %add, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
|
||||
br i1 %exitcond, label %for.end, label %for.body
|
||||
|
||||
for.end: ; preds = %for.body, %entry
|
||||
%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ]
|
||||
ret float %sum.0.lcssa
|
||||
}
|
||||
Loading…
Reference in New Issue