[ARM] Promote fp16 frem

Promote fp16 frem operations on ARM to floats so they call fmodf.

Differential Revision: https://reviews.llvm.org/D62321

llvm-svn: 361713
This commit is contained in:
David Green 2019-05-26 10:30:22 +00:00
parent 1c1e2ca022
commit caf8a11b65
2 changed files with 24 additions and 8 deletions

View File

@ -1142,6 +1142,11 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
} }
} }
// FP16 often need to be promoted to call lib functions
if (Subtarget->hasFullFP16()) {
setOperationAction(ISD::FREM, MVT::f16, Promote);
}
if (Subtarget->hasNEON()) { if (Subtarget->hasNEON()) {
// vmin and vmax aren't available in a scalar form, so we use // vmin and vmax aren't available in a scalar form, so we use
// a NEON instruction with an undef lane instead. // a NEON instruction with an undef lane instead.

View File

@ -57,14 +57,25 @@ define void @test_fdiv(half* %p, half* %q) {
ret void ret void
} }
; FIXME define arm_aapcs_vfpcc void @test_frem(half* %p, half* %q) {
;define void @test_frem(half* %p, half* %q) { ; CHECK-LABEL: test_frem:
; %a = load half, half* %p, align 2 ; CHECK: .save {r4, lr}
; %b = load half, half* %q, align 2 ; CHECK-NEXT: push {r4, lr}
; %r = frem half %a, %b ; CHECK-NEXT: vldr.16 s2, [r1]
; store half %r, half* %p ; CHECK-NEXT: vldr.16 s0, [r0]
; ret void ; CHECK-NEXT: mov r4, r0
;} ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vcvtb.f32.f16 s1, s2
; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vstr.16 s0, [r4]
; CHECK-NEXT: pop {r4, pc}
%a = load half, half* %p, align 2
%b = load half, half* %q, align 2
%r = frem half %a, %b
store half %r, half* %p
ret void
}
define void @test_load_store(half* %p, half* %q) { define void @test_load_store(half* %p, half* %q) {
; CHECK-LABEL: test_load_store: ; CHECK-LABEL: test_load_store: