forked from OSchip/llvm-project
Revert "[x86] Support 3 builtin functions for 32-bits mode"
This reverts commit a69c219a8c
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a69c219a8c
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@ -261,7 +261,6 @@ TARGET_BUILTIN(__builtin_ia32_packsswb128, "V16cV8sV8s", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_packssdw128, "V8sV4iV4i", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_packuswb128, "V16cV8sV8s", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_vec_ext_v4si, "iV4iIi", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_vec_ext_v4sf, "fV4fIi", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_vec_ext_v8hi, "sV8sIi", "ncV:128:", "sse2")
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@ -42,6 +42,7 @@ TARGET_BUILTIN(__builtin_ia32_cvttss2si64, "OiV4f", "ncV:128:", "sse")
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TARGET_BUILTIN(__builtin_ia32_cvtsd2si64, "OiV2d", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_cvttsd2si64, "OiV2d", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_movnti64, "vOi*Oi", "n", "sse2")
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TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2")
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TARGET_BUILTIN(__builtin_ia32_vec_set_v2di, "V2OiV2OiOiIi", "ncV:128:", "sse4.1")
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TARGET_BUILTIN(__builtin_ia32_crc32di, "UOiUOiUOi", "nc", "crc32")
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TARGET_BUILTIN(__builtin_ia32_vec_ext_v4di, "OiV4OiIi", "ncV:256:", "avx")
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@ -3467,13 +3467,13 @@ _mm_cvtsi32_si128(int __a)
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return __extension__ (__m128i)(__v4si){ __a, 0, 0, 0 };
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}
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#ifdef __x86_64__
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/// Returns a vector of [2 x i64] where the lower element is the input
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/// operand and the upper element is zero.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
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/// in 64-bit mode.
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/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
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///
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/// \param __a
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/// A 64-bit signed integer operand containing the value to be converted.
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@ -3483,6 +3483,7 @@ _mm_cvtsi64_si128(long long __a)
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{
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return __extension__ (__m128i)(__v2di){ __a, 0 };
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}
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#endif
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/// Moves the least significant 32 bits of a vector of [4 x i32] to a
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/// 32-bit signed integer value.
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@ -3502,6 +3503,7 @@ _mm_cvtsi128_si32(__m128i __a)
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return __b[0];
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}
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#ifdef __x86_64__
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/// Moves the least significant 64 bits of a vector of [2 x i64] to a
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/// 64-bit signed integer value.
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///
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@ -3518,6 +3520,7 @@ _mm_cvtsi128_si64(__m128i __a)
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{
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return __a[0];
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}
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#endif
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/// Moves packed integer values from an aligned 128-bit memory location
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/// to elements in a 128-bit integer vector.
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@ -1061,6 +1061,7 @@ _mm_max_epu32 (__m128i __V1, __m128i __V2)
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#define _mm_extract_epi32(X, N) \
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((int)__builtin_ia32_vec_ext_v4si((__v4si)(__m128i)(X), (int)(N)))
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#ifdef __x86_64__
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/// Extracts a 64-bit element from the 128-bit integer vector of
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/// [2 x i64], using the immediate value parameter \a N as a selector.
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///
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@ -1070,8 +1071,7 @@ _mm_max_epu32 (__m128i __V1, __m128i __V2)
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/// long long _mm_extract_epi64(__m128i X, const int N);
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/// \endcode
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///
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/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction
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/// in 64-bit mode.
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/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction.
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///
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/// \param X
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/// A 128-bit integer vector.
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@ -1081,8 +1081,9 @@ _mm_max_epu32 (__m128i __V1, __m128i __V2)
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/// 0: Bits [63:0] are returned. \n
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/// 1: Bits [127:64] are returned. \n
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/// \returns A 64-bit integer.
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#define _mm_extract_epi64(X, N) \
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#define _mm_extract_epi64(X, N) \
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((long long)__builtin_ia32_vec_ext_v2di((__v2di)(__m128i)(X), (int)(N)))
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#endif /* __x86_64 */
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/* SSE4 128-bit Packed Integer Comparisons. */
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/// Tests whether the specified bits in a 128-bit integer vector are all
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@ -510,11 +510,13 @@ int test_mm_cvtsi128_si32(__m128i A) {
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return _mm_cvtsi128_si32(A);
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}
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#ifdef __x86_64__
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long long test_mm_cvtsi128_si64(__m128i A) {
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// CHECK-LABEL: test_mm_cvtsi128_si64
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// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
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// X64-LABEL: test_mm_cvtsi128_si64
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// X64: extractelement <2 x i64> %{{.*}}, i32 0
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return _mm_cvtsi128_si64(A);
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}
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#endif
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__m128d test_mm_cvtsi32_sd(__m128d A, int B) {
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// CHECK-LABEL: test_mm_cvtsi32_sd
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@ -539,14 +541,14 @@ __m128d test_mm_cvtsi64_sd(__m128d A, long long B) {
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// X64: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
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return _mm_cvtsi64_sd(A, B);
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}
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#endif
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__m128i test_mm_cvtsi64_si128(long long A) {
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// CHECK-LABEL: test_mm_cvtsi64_si128
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// CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
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// CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
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// X64-LABEL: test_mm_cvtsi64_si128
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// X64: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
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// X64: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
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return _mm_cvtsi64_si128(A);
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}
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#endif
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__m128d test_mm_cvtss_sd(__m128d A, __m128 B) {
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// CHECK-LABEL: test_mm_cvtss_sd
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@ -184,11 +184,13 @@ int test_mm_extract_epi32(__m128i x) {
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return _mm_extract_epi32(x, 1);
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}
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#ifdef __x86_64__
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long long test_mm_extract_epi64(__m128i x) {
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// CHECK-LABEL: test_mm_extract_epi64
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// CHECK: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1
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// X64-LABEL: test_mm_extract_epi64
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// X64: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1
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return _mm_extract_epi64(x, 1);
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}
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#endif
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int test_mm_extract_ps(__m128 x) {
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// CHECK-LABEL: test_mm_extract_ps
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