From cac328f25efb6557969058027eaf737a287ee118 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 5 Feb 2017 18:33:31 +0000 Subject: [PATCH] [X86] Fix printing of sha256rnds2 to include the implicit %xmm0 argument. llvm-svn: 294132 --- llvm/lib/Target/X86/X86InstrSSE.td | 16 ++++++++++------ llvm/test/CodeGen/X86/sha.ll | 6 +++--- llvm/test/MC/Disassembler/X86/x86-64.txt | 4 ++-- llvm/test/MC/X86/x86_64-encoding.s | 8 ++++---- 4 files changed, 19 insertions(+), 15 deletions(-) diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index c91889f22403..4f8e7c95d913 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -7479,14 +7479,18 @@ multiclass SHAI_binop Opc, string OpcodeStr, Intrinsic IntId, bit UsesXMM0 = 0> { def rr : I, T8; def rm : I; -def : InstAlias<"sha256rnds2\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}", - (SHA256RNDS2rm VR128:$dst, i128mem:$src2)>; +def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}", + (SHA256RNDS2rr VR128:$dst, VR128:$src2), 0>; +def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}", + (SHA256RNDS2rm VR128:$dst, i128mem:$src2), 0>; //===----------------------------------------------------------------------===// // AES-NI Instructions diff --git a/llvm/test/CodeGen/X86/sha.ll b/llvm/test/CodeGen/X86/sha.ll index fe42637bc538..eb1966470491 100644 --- a/llvm/test/CodeGen/X86/sha.ll +++ b/llvm/test/CodeGen/X86/sha.ll @@ -86,7 +86,7 @@ entry: ; CHECK: test_sha256rnds2rr ; CHECK: movaps %xmm0, [[XMM_TMP1:%xmm[1-9][0-9]?]] ; CHECK: movaps %xmm2, %xmm0 - ; CHECK: sha256rnds2 %xmm1, [[XMM_TMP1]] + ; CHECK: sha256rnds2 %xmm0, %xmm1, [[XMM_TMP1]] } define <4 x i32> @test_sha256rnds2rm(<4 x i32> %a, <4 x i32>* %b, <4 x i32> %c) nounwind uwtable { @@ -97,7 +97,7 @@ entry: ; CHECK: test_sha256rnds2rm ; CHECK: movaps %xmm0, [[XMM_TMP2:%xmm[1-9][0-9]?]] ; CHECK: movaps %xmm1, %xmm0 - ; CHECK: sha256rnds2 (%rdi), [[XMM_TMP2]] + ; CHECK: sha256rnds2 %xmm0, (%rdi), [[XMM_TMP2]] } declare <4 x i32> @llvm.x86.sha256msg1(<4 x i32>, <4 x i32>) nounwind readnone @@ -136,4 +136,4 @@ entry: ret <4 x i32> %1 ; CHECK: test_sha256msg2rm ; CHECK: sha256msg2 (%rdi), %xmm0 -} \ No newline at end of file +} diff --git a/llvm/test/MC/Disassembler/X86/x86-64.txt b/llvm/test/MC/Disassembler/X86/x86-64.txt index 13e36df002a4..de62b0ff1d77 100644 --- a/llvm/test/MC/Disassembler/X86/x86-64.txt +++ b/llvm/test/MC/Disassembler/X86/x86-64.txt @@ -185,10 +185,10 @@ # CHECK: sha1msg2 (%rax), %xmm2 0x0f 0x38 0xca 0x10 -# CHECK: sha256rnds2 (%rax), %xmm2 +# CHECK: sha256rnds2 %xmm0, (%rax), %xmm2 0x0f 0x38 0xcb 0x10 -# CHECK: sha256rnds2 %xmm1, %xmm2 +# CHECK: sha256rnds2 %xmm0, %xmm1, %xmm2 0x0f 0x38 0xcb 0xd1 # CHECK: sha256msg1 %xmm1, %xmm2 diff --git a/llvm/test/MC/X86/x86_64-encoding.s b/llvm/test/MC/X86/x86_64-encoding.s index 62af1bdb2357..c502ed466433 100644 --- a/llvm/test/MC/X86/x86_64-encoding.s +++ b/llvm/test/MC/X86/x86_64-encoding.s @@ -148,19 +148,19 @@ sha1msg2 %xmm1, %xmm2 // CHECK: encoding: [0x0f,0x38,0xca,0x10] sha1msg2 (%rax), %xmm2 -// CHECK: sha256rnds2 (%rax), %xmm2 +// CHECK: sha256rnds2 %xmm0, (%rax), %xmm2 // CHECK: encoding: [0x0f,0x38,0xcb,0x10] sha256rnds2 (%rax), %xmm2 -// CHECK: sha256rnds2 %xmm1, %xmm2 +// CHECK: sha256rnds2 %xmm0, %xmm1, %xmm2 // CHECK: encoding: [0x0f,0x38,0xcb,0xd1] sha256rnds2 %xmm1, %xmm2 -// CHECK: sha256rnds2 (%rax), %xmm2 +// CHECK: sha256rnds2 %xmm0, (%rax), %xmm2 // CHECK: encoding: [0x0f,0x38,0xcb,0x10] sha256rnds2 %xmm0, (%rax), %xmm2 -// CHECK: sha256rnds2 %xmm1, %xmm2 +// CHECK: sha256rnds2 %xmm0, %xmm1, %xmm2 // CHECK: encoding: [0x0f,0x38,0xcb,0xd1] sha256rnds2 %xmm0, %xmm1, %xmm2