forked from OSchip/llvm-project
[SystemZ] Commenting (NFC)
Some minor commenting in scheduler files. Review: Ulrich Weigand llvm-svn: 332599
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@ -10,6 +10,8 @@
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// This file defines the machine model for Z13 to support instruction
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// scheduling and other instruction cost heuristics.
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//
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// Pseudos expanded right after isel do not need to be modelled here.
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//
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//===----------------------------------------------------------------------===//
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def Z13Model : SchedMachineModel {
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@ -28,9 +30,9 @@ def Z13Model : SchedMachineModel {
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let SchedModel = Z13Model in {
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// These definitions could be put in a subtarget common include file,
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// but it seems the include system in Tablegen currently rejects
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// multiple includes of same file.
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// These definitions need the SchedModel value. They could be put in a
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// subtarget common include file, but it seems the include system in Tablegen
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// currently (2016) rejects multiple includes of same file.
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def : WriteRes<GroupAlone, []> {
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let NumMicroOps = 0;
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let BeginGroup = 1;
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@ -10,6 +10,8 @@
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// This file defines the machine model for Z14 to support instruction
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// scheduling and other instruction cost heuristics.
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//
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// Pseudos expanded right after isel do not need to be modelled here.
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//
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//===----------------------------------------------------------------------===//
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def Z14Model : SchedMachineModel {
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@ -28,9 +30,9 @@ def Z14Model : SchedMachineModel {
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let SchedModel = Z14Model in {
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// These definitions could be put in a subtarget common include file,
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// but it seems the include system in Tablegen currently rejects
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// multiple includes of same file.
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// These definitions need the SchedModel value. They could be put in a
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// subtarget common include file, but it seems the include system in Tablegen
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// currently (2016) rejects multiple includes of same file.
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def : WriteRes<GroupAlone, []> {
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let NumMicroOps = 0;
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let BeginGroup = 1;
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