forked from OSchip/llvm-project
[X86][MMX] Add test showing bad stack spill of shift value
i32 is spilled to stack but 64-bit mmx is reloaded - leaving garbage in the other half of the register llvm-svn: 297471
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@ -562,3 +562,44 @@ entry:
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ret i64 %s
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}
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declare x86_mmx @llvm.x86.mmx.psrl.q(x86_mmx, x86_mmx)
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; FIXME: Show issue with storing i32 to stack and then reloading as x86_mmx
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; which will lead to garbage in the other 32-bits.
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define i64 @test_psrlq_by_volatile_shift_amount(x86_mmx %t) nounwind {
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; X86-LABEL: test_psrlq_by_volatile_shift_amount:
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; X86: # BB#0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: andl $-8, %esp
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; X86-NEXT: subl $16, %esp
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; X86-NEXT: movl $1, {{[0-9]+}}(%esp)
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; X86-NEXT: movd {{[0-9]+}}(%esp), %mm1
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; X86-NEXT: psrlq %mm1, %mm0
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; X86-NEXT: movq %mm0, {{[0-9]+}}(%esp)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl %ebp, %esp
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl
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;
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; X64-LABEL: test_psrlq_by_volatile_shift_amount:
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; X64: # BB#0: # %entry
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; X64-NEXT: movl $1, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movd -{{[0-9]+}}(%rsp), %mm1
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; X64-NEXT: psrlq %mm1, %mm0
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; X64-NEXT: movd %mm0, %rax
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; X64-NEXT: retq
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entry:
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%0 = alloca i32, align 4
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%1 = bitcast i32* %0 to i8*
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call void @llvm.lifetime.start(i64 4, i8* nonnull %1)
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store volatile i32 1, i32* %0, align 4
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%2 = load volatile i32, i32* %0, align 4
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%3 = tail call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %t, i32 %2)
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%4 = bitcast x86_mmx %3 to i64
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call void @llvm.lifetime.end(i64 4, i8* nonnull %1)
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ret i64 %4
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}
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declare void @llvm.lifetime.start(i64, i8* nocapture)
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declare void @llvm.lifetime.end(i64, i8* nocapture)
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