forked from OSchip/llvm-project
R600/SI: Add missing offset operand to buffer bothen
llvm-svn: 229605
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2ad8bab7ee
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caa1288fff
llvm
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@ -1856,8 +1856,8 @@ multiclass MUBUF_Load_Helper <mubuf op, string name, RegisterClass regClass,
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let offen = 1, idxen = 1 in {
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defm _BOTHEN : MUBUF_m <op, name#"_bothen", (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VReg_64:$vaddr,
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SCSrc_32:$soffset, glc:$glc, slc:$slc, tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset, idxen offen"#"$glc"#"$slc"#"$tfe", []>;
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SCSrc_32:$soffset, mbuf_offset:$offset, glc:$glc, slc:$slc, tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset idxen offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
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}
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let offen = 0, idxen = 0, glc = 0, slc = 0, tfe = 0 in {
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@ -2948,9 +2948,9 @@ multiclass MUBUF_Load_Dword <ValueType vt, MUBUF offset, MUBUF offen, MUBUF idxe
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def : Pat <
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(vt (int_SI_buffer_load_dword v4i32:$rsrc, v2i32:$vaddr, i32:$soffset,
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imm, 1, 1, imm:$glc, imm:$slc,
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imm:$offset, 1, 1, imm:$glc, imm:$slc,
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imm:$tfe)),
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(bothen $rsrc, $vaddr, $soffset, (as_i1imm $glc), (as_i1imm $slc),
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(bothen $rsrc, $vaddr, $soffset, (as_i16imm $offset), (as_i1imm $glc), (as_i1imm $slc),
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(as_i1imm $tfe))
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>;
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}
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@ -1,29 +1,41 @@
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;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
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;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
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; RUN: llc -march=amdgcn -mcpu=verde -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s
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; Example of a simple geometry shader loading vertex attributes from the
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; ESGS ring buffer
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; CHECK-LABEL: {{^}}main:
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; CHECK: buffer_load_dword
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; CHECK: buffer_load_dword
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; CHECK: buffer_load_dword
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; CHECK: buffer_load_dword
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; FIXME: Out of bounds immediate offset crashes
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define void @main([17 x <16 x i8>] addrspace(2)* byval, [32 x <16 x i8>] addrspace(2)* byval, [16 x <32 x i8>] addrspace(2)* byval, [2 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* inreg, [17 x <16 x i8>] addrspace(2)* inreg, i32, i32, i32, i32) #0 {
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; CHECK-LABEL: {{^}}main:
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; CHECK: buffer_load_dword {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 glc slc
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; CHECK: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 offen glc slc
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; CHECK: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen glc slc
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; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen offen glc slc
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; CHECK: s_movk_i32 [[K:s[0-9]+]], 0x4d2 ; encoding
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; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, [[K]] idxen offen offset:65535 glc slc
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define void @main([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, [2 x <16 x i8>] addrspace(2)* byval %arg3, [17 x <16 x i8>] addrspace(2)* inreg %arg4, [17 x <16 x i8>] addrspace(2)* inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9) #0 {
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main_body:
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%10 = getelementptr [2 x <16 x i8>] addrspace(2)* %3, i64 0, i32 1
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%11 = load <16 x i8> addrspace(2)* %10, !tbaa !0
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%12 = shl i32 %6, 2
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%13 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %11, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0)
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%14 = bitcast i32 %13 to float
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%15 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %11, i32 %12, i32 0, i32 0, i32 1, i32 0, i32 1, i32 1, i32 0)
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%16 = bitcast i32 %15 to float
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%17 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %11, i32 %12, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 0)
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%18 = bitcast i32 %17 to float
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%19 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %11, <2 x i32> <i32 0, i32 0>, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 0)
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%20 = bitcast i32 %19 to float
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call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %14, float %16, float %18, float %20)
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%tmp = getelementptr [2 x <16 x i8>] addrspace(2)* %arg3, i64 0, i32 1
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%tmp10 = load <16 x i8> addrspace(2)* %tmp, !tbaa !0
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%tmp11 = shl i32 %arg6, 2
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%tmp12 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0)
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%tmp13 = bitcast i32 %tmp12 to float
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%tmp14 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i32 1, i32 0, i32 1, i32 1, i32 0)
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%tmp15 = bitcast i32 %tmp14 to float
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%tmp16 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 0)
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%tmp17 = bitcast i32 %tmp16 to float
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%tmp18 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 0)
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%tmp19 = bitcast i32 %tmp18 to float
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%tmp20 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer, i32 0, i32 123, i32 1, i32 1, i32 1, i32 1, i32 0)
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%tmp21 = bitcast i32 %tmp20 to float
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%tmp22 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer, i32 1234, i32 65535, i32 1, i32 1, i32 1, i32 1, i32 0)
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%tmp23 = bitcast i32 %tmp22 to float
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call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %tmp13, float %tmp15, float %tmp17, float %tmp19)
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call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %tmp21, float %tmp23, float %tmp23, float %tmp23)
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ret void
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}
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