From ca9583a70aebf5ae3ba6fe615e577fc8da9e64a1 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 8 Feb 2019 19:59:39 +0000 Subject: [PATCH] AMDGPU/GlobalISel: Fix broken tests llvm-svn: 353559 --- .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 15 +++++++++++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir | 16 ++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir index 2e393512be86..f510d21fb2e2 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir @@ -12,12 +12,20 @@ body: | ; SI-LABEL: name: test_fabs_s32 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; SI: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[COPY]] + ; SI: $vgpr0 = COPY [[FABS]](s32) ; VI-LABEL: name: test_fabs_s32 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; VI: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[COPY]] + ; VI: $vgpr0 = COPY [[FABS]](s32) ; GFX9-LABEL: name: test_fabs_s32 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; GFX9: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[COPY]] + ; GFX9: $vgpr0 = COPY [[FABS]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s32) = G_FABS %0 + $vgpr0 = COPY %1 + ... --- name: test_fabs_s64 @@ -27,12 +35,19 @@ body: | ; SI-LABEL: name: test_fabs_s64 ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 + ; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]] + ; SI: $vgpr0_vgpr1 = COPY [[FABS]](s64) ; VI-LABEL: name: test_fabs_s64 ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 + ; VI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]] + ; VI: $vgpr0_vgpr1 = COPY [[FABS]](s64) ; GFX9-LABEL: name: test_fabs_s64 ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 + ; GFX9: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]] + ; GFX9: $vgpr0_vgpr1 = COPY [[FABS]](s64) %0:_(s64) = COPY $vgpr0_vgpr1 %1:_(s64) = G_FABS %0 + $vgpr0_vgpr1 = COPY %1 ... --- name: test_fabs_s16 diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir index 579b59361bc1..02e50cb365e6 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir @@ -11,13 +11,21 @@ body: | ; SI-LABEL: name: test_fsqrt_s32 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; SI: [[FSQRT:%[0-9]+]]:_(s32) = G_FSQRT [[COPY]] + ; SI: $vgpr0 = COPY [[FSQRT]](s32) ; VI-LABEL: name: test_fsqrt_s32 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; VI: [[FSQRT:%[0-9]+]]:_(s32) = G_FSQRT [[COPY]] + ; VI: $vgpr0 = COPY [[FSQRT]](s32) ; GFX9-LABEL: name: test_fsqrt_s32 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; GFX9: [[FSQRT:%[0-9]+]]:_(s32) = G_FSQRT [[COPY]] + ; GFX9: $vgpr0 = COPY [[FSQRT]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s32) = G_FSQRT %0 + $vgpr0 = COPY %1 ... + --- name: test_fsqrt_s64 body: | @@ -26,12 +34,20 @@ body: | ; SI-LABEL: name: test_fsqrt_s64 ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 + ; SI: [[FSQRT:%[0-9]+]]:_(s64) = G_FSQRT [[COPY]] + ; SI: $vgpr0_vgpr1 = COPY [[FSQRT]](s64) ; VI-LABEL: name: test_fsqrt_s64 ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 + ; VI: [[FSQRT:%[0-9]+]]:_(s64) = G_FSQRT [[COPY]] + ; VI: $vgpr0_vgpr1 = COPY [[FSQRT]](s64) ; GFX9-LABEL: name: test_fsqrt_s64 ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 + ; GFX9: [[FSQRT:%[0-9]+]]:_(s64) = G_FSQRT [[COPY]] + ; GFX9: $vgpr0_vgpr1 = COPY [[FSQRT]](s64) %0:_(s64) = COPY $vgpr0_vgpr1 %1:_(s64) = G_FSQRT %0 + $vgpr0_vgpr1 = COPY %1 + ... --- name: test_fsqrt_s16