forked from OSchip/llvm-project
Merge the OptimizeExts and OptimizeCmps passes into one PeepholeOptimizer
pass. This pass should expand with all of the small, fine-grained optimization passes to reduce compile time and increase happiment. llvm-svn: 110627
This commit is contained in:
Bill Wendling
parent
2f1a7d9e76
commit
ca67835eaa
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@ -172,18 +172,14 @@ namespace llvm {
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/// instructions.
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FunctionPass *createMachineSinkingPass();
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/// createOptimizeExtsPass - This pass performs sign / zero extension
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/// optimization by increasing uses of extended values.
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FunctionPass *createOptimizeExtsPass();
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/// createPeepholeOptimizerPass - This pass performs peephole optimizations -
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/// like extension and comparison eliminations.
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FunctionPass *createPeepholeOptimizerPass();
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/// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
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/// to take advantage of opportunities created during DAG legalization.
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FunctionPass *createOptimizePHIsPass();
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/// createOptimizeCmpsPass - This pass performs redundant comparison removal
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/// optimization.
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FunctionPass *createOptimizeCmpsPass();
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/// createStackSlotColoringPass - This pass performs stack slot coloring.
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FunctionPass *createStackSlotColoringPass(bool);
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@ -353,8 +353,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
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PM.add(createDeadMachineInstructionElimPass());
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printAndVerify(PM, "After codegen DCE pass");
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PM.add(createOptimizeExtsPass());
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PM.add(createOptimizeCmpsPass());
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PM.add(createPeepholeOptimizerPass());
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if (!DisableMachineLICM)
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PM.add(createMachineLICMPass());
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PM.add(createMachineCSEPass());
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@ -1,112 +0,0 @@
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//===-- OptimizeCmps.cpp - Optimize comparison instrs ---------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass performs optimization of comparison instructions. For instance, in
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// this code:
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//
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// sub r1, 1
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// cmp r1, 0
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// bz L1
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//
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// If the "sub" instruction all ready sets (or could be modified to set) the
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// same flag that the "cmp" instruction sets and that "bz" uses, then we can
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// eliminate the "cmp" instruction.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "opt-compares"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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STATISTIC(NumEliminated, "Number of compares eliminated");
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static cl::opt<bool>
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EnableOptCmps("enable-optimize-cmps", cl::init(false), cl::Hidden);
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namespace {
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class OptimizeCmps : public MachineFunctionPass {
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const TargetMachine *TM;
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const TargetInstrInfo *TII;
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MachineRegisterInfo *MRI;
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bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB);
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public:
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static char ID; // Pass identification
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OptimizeCmps() : MachineFunctionPass(ID) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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}
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char OptimizeCmps::ID = 0;
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INITIALIZE_PASS(OptimizeCmps, "opt-cmps",
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"Optimize comparison instrs", false, false);
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FunctionPass *llvm::createOptimizeCmpsPass() { return new OptimizeCmps(); }
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/// OptimizeCmpInstr - If the instruction is a compare and the previous
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/// instruction it's comparing against all ready sets (or could be modified to
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/// set) the same flag as the compare, then we can remove the comparison and use
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/// the flag from the previous instruction.
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bool OptimizeCmps::OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB) {
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// If this instruction is a comparison against zero and isn't comparing a
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// physical register, we can try to optimize it.
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unsigned SrcReg;
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int CmpValue;
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if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) ||
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TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0)
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return false;
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MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg);
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if (llvm::next(DI) != MRI->def_end())
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// Only support one definition.
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return false;
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// Attempt to convert the defining instruction to set the "zero" flag.
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if (TII->ConvertToSetZeroFlag(&*DI, MI)) {
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++NumEliminated;
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return true;
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}
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return false;
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}
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bool OptimizeCmps::runOnMachineFunction(MachineFunction &MF) {
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TM = &MF.getTarget();
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TII = TM->getInstrInfo();
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MRI = &MF.getRegInfo();
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if (!EnableOptCmps) return false;
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bool Changed = false;
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
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MachineBasicBlock *MBB = &*I;
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for (MachineBasicBlock::iterator
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MII = MBB->begin(), ME = MBB->end(); MII != ME; ) {
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MachineInstr *MI = &*MII++;
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if (MI->getDesc().isCompare())
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Changed |= OptimizeCmpInstr(MI, MBB);
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}
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}
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return Changed;
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}
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@ -1,4 +1,4 @@
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//===-- OptimizeExts.cpp - Optimize sign / zero extension instrs -----===//
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//===-- PeepholeOptimizer.cpp - Peephole Optimizations --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -7,17 +7,33 @@
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass performs optimization of sign / zero extension instructions. It
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// may be extended to handle other instructions of similar property.
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// Perform peephole optimizations on the machine code:
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//
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// On some targets, some instructions, e.g. X86 sign / zero extension, may
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// leave the source value in the lower part of the result. This pass will
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// replace (some) uses of the pre-extension value with uses of the sub-register
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// of the results.
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// - Optimize Extensions
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//
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// Optimization of sign / zero extension instructions. It may be extended to
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// handle other instructions with similar properties.
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//
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// On some targets, some instructions, e.g. X86 sign / zero extension, may
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// leave the source value in the lower part of the result. This optimization
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// will replace some uses of the pre-extension value with uses of the
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// sub-register of the results.
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//
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// - Optimize Comparisons
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//
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// Optimization of comparison instructions. For instance, in this code:
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//
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// sub r1, 1
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// cmp r1, 0
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// bz L1
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//
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// If the "sub" instruction all ready sets (or could be modified to set) the
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// same flag that the "cmp" instruction sets and that "bz" uses, then we can
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// eliminate the "cmp" instruction.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "ext-opt"
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#define DEBUG_TYPE "peephole-opt"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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@ -29,21 +45,29 @@
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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static cl::opt<bool> Aggressive("aggressive-ext-opt", cl::Hidden,
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cl::desc("Aggressive extension optimization"));
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// Optimize Extensions
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static cl::opt<bool>
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Aggressive("aggressive-ext-opt", cl::Hidden,
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cl::desc("Aggressive extension optimization"));
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STATISTIC(NumReuse, "Number of extension results reused");
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// Optimize Comparisons
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static cl::opt<bool>
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EnableOptCmps("enable-optimize-cmps", cl::init(false), cl::Hidden);
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STATISTIC(NumEliminated, "Number of compares eliminated");
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namespace {
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class OptimizeExts : public MachineFunctionPass {
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class PeepholeOptimizer : public MachineFunctionPass {
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const TargetMachine *TM;
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const TargetInstrInfo *TII;
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MachineRegisterInfo *MRI;
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MachineDominatorTree *DT; // Machine dominator tree
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MachineRegisterInfo *MRI;
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MachineDominatorTree *DT; // Machine dominator tree
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public:
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static char ID; // Pass identification
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OptimizeExts() : MachineFunctionPass(ID) {}
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PeepholeOptimizer() : MachineFunctionPass(ID) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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@ -57,27 +81,32 @@ namespace {
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}
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private:
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bool OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &LocalMIs);
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bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB);
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bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &LocalMIs);
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};
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}
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char OptimizeExts::ID = 0;
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INITIALIZE_PASS(OptimizeExts, "opt-exts",
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"Optimize sign / zero extensions", false, false);
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char PeepholeOptimizer::ID = 0;
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INITIALIZE_PASS(PeepholeOptimizer, "peephole-opts",
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"Peephole Optimizations", false, false);
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FunctionPass *llvm::createOptimizeExtsPass() { return new OptimizeExts(); }
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FunctionPass *llvm::createPeepholeOptimizerPass() {
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return new PeepholeOptimizer();
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}
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/// OptimizeInstr - If instruction is a copy-like instruction, i.e. it reads
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/// a single register and writes a single register and it does not modify
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/// the source, and if the source value is preserved as a sub-register of
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/// the result, then replace all reachable uses of the source with the subreg
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/// of the result.
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/// Do not generate an EXTRACT that is used only in a debug use, as this
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/// changes the code. Since this code does not currently share EXTRACTs, just
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/// ignore all debug uses.
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bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
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/// OptimizeExtInstr - If instruction is a copy-like instruction, i.e. it reads
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/// a single register and writes a single register and it does not modify the
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/// source, and if the source value is preserved as a sub-register of the
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/// result, then replace all reachable uses of the source with the subreg of the
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/// result.
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///
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/// Do not generate an EXTRACT that is used only in a debug use, as this changes
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/// the code. Since this code does not currently share EXTRACTs, just ignore all
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/// debug uses.
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bool PeepholeOptimizer::
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OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
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LocalMIs.insert(MI);
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unsigned SrcReg, DstReg, SubIdx;
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@ -93,20 +122,21 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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// No other uses.
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return false;
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// Ok, the source has other uses. See if we can replace the other uses
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// with use of the result of the extension.
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// The source has other uses. See if we can replace the other uses with use of
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// the result of the extension.
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SmallPtrSet<MachineBasicBlock*, 4> ReachedBBs;
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UI = MRI->use_nodbg_begin(DstReg);
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for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
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UI != UE; ++UI)
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ReachedBBs.insert(UI->getParent());
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bool ExtendLife = true;
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// Uses that are in the same BB of uses of the result of the instruction.
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SmallVector<MachineOperand*, 8> Uses;
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// Uses that the result of the instruction can reach.
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SmallVector<MachineOperand*, 8> ExtendedUses;
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bool ExtendLife = true;
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UI = MRI->use_nodbg_begin(SrcReg);
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for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
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UI != UE; ++UI) {
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@ -114,6 +144,7 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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MachineInstr *UseMI = &*UI;
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if (UseMI == MI)
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continue;
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if (UseMI->isPHI()) {
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ExtendLife = false;
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continue;
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@ -144,15 +175,15 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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// Local uses that come after the extension.
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if (!LocalMIs.count(UseMI))
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Uses.push_back(&UseMO);
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} else if (ReachedBBs.count(UseMBB))
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// Non-local uses where the result of extension is used. Always replace
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// these unless it's a PHI.
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} else if (ReachedBBs.count(UseMBB)) {
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// Non-local uses where the result of the extension is used. Always
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// replace these unless it's a PHI.
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Uses.push_back(&UseMO);
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else if (Aggressive && DT->dominates(MBB, UseMBB))
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// We may want to extend live range of the extension result in order to
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// replace these uses.
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} else if (Aggressive && DT->dominates(MBB, UseMBB)) {
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// We may want to extend the live range of the extension result in order
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// to replace these uses.
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ExtendedUses.push_back(&UseMO);
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else {
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} else {
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// Both will be live out of the def MBB anyway. Don't extend live range of
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// the extension result.
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ExtendLife = false;
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@ -161,7 +192,7 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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}
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if (ExtendLife && !ExtendedUses.empty())
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// Ok, we'll extend the liveness of the extension result.
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// Extend the liveness of the extension result.
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std::copy(ExtendedUses.begin(), ExtendedUses.end(),
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std::back_inserter(Uses));
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@ -169,12 +200,13 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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bool Changed = false;
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if (!Uses.empty()) {
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SmallPtrSet<MachineBasicBlock*, 4> PHIBBs;
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// Look for PHI uses of the extended result, we don't want to extend the
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// liveness of a PHI input. It breaks all kinds of assumptions down
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// stream. A PHI use is expected to be the kill of its source values.
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UI = MRI->use_nodbg_begin(DstReg);
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for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
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UI != UE; ++UI)
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for (MachineRegisterInfo::use_nodbg_iterator
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UE = MRI->use_nodbg_end(); UI != UE; ++UI)
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if (UI->isPHI())
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PHIBBs.insert(UI->getParent());
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@ -185,10 +217,12 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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MachineBasicBlock *UseMBB = UseMI->getParent();
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if (PHIBBs.count(UseMBB))
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continue;
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unsigned NewVR = MRI->createVirtualRegister(RC);
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BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
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TII->get(TargetOpcode::COPY), NewVR)
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.addReg(DstReg, 0, SubIdx);
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UseMO->setReg(NewVR);
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++NumReuse;
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Changed = true;
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@ -198,11 +232,41 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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return Changed;
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}
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bool OptimizeExts::runOnMachineFunction(MachineFunction &MF) {
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TM = &MF.getTarget();
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/// OptimizeCmpInstr - If the instruction is a compare and the previous
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/// instruction it's comparing against all ready sets (or could be modified to
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/// set) the same flag as the compare, then we can remove the comparison and use
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/// the flag from the previous instruction.
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bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
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MachineBasicBlock *MBB) {
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if (!EnableOptCmps) return false;
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// If this instruction is a comparison against zero and isn't comparing a
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// physical register, we can try to optimize it.
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unsigned SrcReg;
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int CmpValue;
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if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) ||
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TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0)
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return false;
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MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg);
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if (llvm::next(DI) != MRI->def_end())
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// Only support one definition.
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return false;
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// Attempt to convert the defining instruction to set the "zero" flag.
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if (TII->ConvertToSetZeroFlag(&*DI, MI)) {
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++NumEliminated;
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return true;
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}
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return false;
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}
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bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
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TM = &MF.getTarget();
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TII = TM->getInstrInfo();
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MRI = &MF.getRegInfo();
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DT = Aggressive ? &getAnalysis<MachineDominatorTree>() : 0;
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DT = Aggressive ? &getAnalysis<MachineDominatorTree>() : 0;
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bool Changed = false;
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@ -210,10 +274,18 @@ bool OptimizeExts::runOnMachineFunction(MachineFunction &MF) {
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
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MachineBasicBlock *MBB = &*I;
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LocalMIs.clear();
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for (MachineBasicBlock::iterator MII = I->begin(), ME = I->end(); MII != ME;
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++MII) {
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for (MachineBasicBlock::iterator
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MII = I->begin(), ME = I->end(); MII != ME; ) {
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MachineInstr *MI = &*MII;
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Changed |= OptimizeInstr(MI, MBB, LocalMIs);
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if (MI->getDesc().isCompare()) {
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++MII; // The iterator may become invalid if the compare is deleted.
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Changed |= OptimizeCmpInstr(MI, MBB);
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} else {
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Changed |= OptimizeExtInstr(MI, MBB, LocalMIs);
|
||||
++MII;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue