forked from OSchip/llvm-project
[TargetLowering] Add vector BITCAST support to SimplifyDemandedVectorElts
Notably helps cleanup after legalization of vector types Differential Revision: https://reviews.llvm.org/D43674 llvm-svn: 326838
This commit is contained in:
Simon Pilgrim
parent
bf6e1c26cf
commit
ca38c762e4
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@ -1340,6 +1340,74 @@ bool TargetLowering::SimplifyDemandedVectorElts(
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KnownUndef.setHighBits(NumElts - 1);
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break;
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}
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case ISD::BITCAST: {
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SDValue Src = Op.getOperand(0);
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EVT SrcVT = Src.getValueType();
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// We only handle vectors here.
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// TODO - investigate calling SimplifyDemandedBits/ComputeKnownBits?
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if (!SrcVT.isVector())
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break;
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// Fast handling of 'identity' bitcasts.
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unsigned NumSrcElts = SrcVT.getVectorNumElements();
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if (NumSrcElts == NumElts)
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return SimplifyDemandedVectorElts(Src, DemandedElts, KnownUndef,
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KnownZero, TLO, Depth + 1);
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APInt SrcZero, SrcUndef;
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APInt SrcDemandedElts = APInt::getNullValue(NumSrcElts);
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// Bitcast from 'large element' src vector to 'small element' vector, we
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// must demand a source element if any DemandedElt maps to it.
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if ((NumElts % NumSrcElts) == 0) {
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unsigned Scale = NumElts / NumSrcElts;
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for (unsigned i = 0; i != NumElts; ++i)
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if (DemandedElts[i])
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SrcDemandedElts.setBit(i / Scale);
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if (SimplifyDemandedVectorElts(Src, SrcDemandedElts, SrcUndef, SrcZero,
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TLO, Depth + 1))
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return true;
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// If the src element is zero/undef then all the output elements will be -
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// only demanded elements are guaranteed to be correct.
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for (unsigned i = 0; i != NumSrcElts; ++i) {
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if (SrcDemandedElts[i]) {
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if (SrcZero[i])
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KnownZero.setBits(i * Scale, (i + 1) * Scale);
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if (SrcUndef[i])
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KnownUndef.setBits(i * Scale, (i + 1) * Scale);
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}
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}
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}
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// Bitcast from 'small element' src vector to 'large element' vector, we
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// demand all smaller source elements covered by the larger demanded element
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// of this vector.
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if ((NumSrcElts % NumElts) == 0) {
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unsigned Scale = NumSrcElts / NumElts;
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for (unsigned i = 0; i != NumElts; ++i)
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if (DemandedElts[i])
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SrcDemandedElts.setBits(i * Scale, (i + 1) * Scale);
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if (SimplifyDemandedVectorElts(Src, SrcDemandedElts, SrcUndef, SrcZero,
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TLO, Depth + 1))
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return true;
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// If all the src elements covering an output element are zero/undef, then
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// the output element will be as well, assuming it was demanded.
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for (unsigned i = 0; i != NumElts; ++i) {
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if (DemandedElts[i]) {
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if (SrcZero.extractBits(Scale, i * Scale).isAllOnesValue())
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KnownZero.setBit(i);
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if (SrcUndef.extractBits(Scale, i * Scale).isAllOnesValue())
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KnownUndef.setBit(i);
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}
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}
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}
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break;
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}
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case ISD::BUILD_VECTOR: {
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// Check all elements and simplify any unused elements with UNDEF.
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if (!DemandedElts.isAllOnesValue()) {
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@ -2040,16 +2040,17 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind
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; SSE2-NEXT: movaps (%rsi), %xmm0
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; SSE2-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %edi
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r15d
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r13d
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r10d
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %edi
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r14d
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r9d
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r8d
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ebx
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r12d
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ebp
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; SSE2-NEXT: movq %rbp, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ebp
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; SSE2-NEXT: movq %rbp, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ebp
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@ -2061,168 +2062,163 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ebp
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; SSE2-NEXT: movq %rbp, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r11d
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; SSE2-NEXT: addq %rax, %r11
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq %rdi, %rax
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; SSE2-NEXT: movq %rax, %rdi
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r14d
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; SSE2-NEXT: addq %r15, %r14
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ebp
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; SSE2-NEXT: addq %rax, %rbp
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq %rsi, %rax
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; SSE2-NEXT: movq %rax, %r15
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi
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; SSE2-NEXT: addq %rdx, %rsi
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r8d
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; SSE2-NEXT: addq %r13, %r8
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; SSE2-NEXT: movq %rax, %rsi
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r10d
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; SSE2-NEXT: addq %r13, %r10
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r12d
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; SSE2-NEXT: addq %rcx, %r12
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r11d
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; SSE2-NEXT: addq %rdx, %r11
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq %r10, %rax
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; SSE2-NEXT: movq %rax, %r10
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq %rcx, %rax
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; SSE2-NEXT: addq %rdi, %rax
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r13d
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; SSE2-NEXT: addq %r9, %r13
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; SSE2-NEXT: addq %r14, %r13
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r15d
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; SSE2-NEXT: addq %r9, %r15
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r14d
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; SSE2-NEXT: addq %r8, %r14
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r8d
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; SSE2-NEXT: addq %rbx, %r8
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %r9d
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %r9 # 8-byte Folded Reload
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, %rbx
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rdx # 8-byte Folded Reload
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx
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; SSE2-NEXT: addq %rbx, %rcx
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq %r12, %rax
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; SSE2-NEXT: movq %rax, %r9
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, %rbp
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rax # 8-byte Folded Reload
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: xorl %eax, %eax
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %r11
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; SSE2-NEXT: movq %r11, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %r12d
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; SSE2-NEXT: adcq $-1, %r12
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; SSE2-NEXT: addq $-1, %rdi
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; SSE2-NEXT: movq %rdi, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %edx
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; SSE2-NEXT: adcq $-1, %rdx
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; SSE2-NEXT: addq $-1, %r14
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; SSE2-NEXT: movq %r14, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq -{{[0-9]+}}(%rsp), %rcx # 8-byte Folded Reload
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; SSE2-NEXT: movq %rcx, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: xorl %ecx, %ecx
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; SSE2-NEXT: movq %rcx, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %rbp
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; SSE2-NEXT: movq %rbp, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %edi
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; SSE2-NEXT: adcq $-1, %rdi
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; SSE2-NEXT: addq $-1, %r15
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; SSE2-NEXT: movq %r15, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %rsi
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; SSE2-NEXT: movq %rsi, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %esi
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; SSE2-NEXT: adcq $-1, %rsi
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; SSE2-NEXT: addq $-1, %r10
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; SSE2-NEXT: movq %r10, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %r10d
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; SSE2-NEXT: adcq $-1, %r10
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; SSE2-NEXT: addq $-1, %r12
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; SSE2-NEXT: movq %r12, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %ecx
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; SSE2-NEXT: adcq $-1, %rcx
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; SSE2-NEXT: addq $-1, %r11
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; SSE2-NEXT: movq %r11, (%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %r11d
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; SSE2-NEXT: adcq $-1, %r11
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; SSE2-NEXT: addq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: movl $0, %r12d
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; SSE2-NEXT: adcq $-1, %r12
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; SSE2-NEXT: addq $-1, %r13
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; SSE2-NEXT: movl $0, %eax
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; SSE2-NEXT: adcq $-1, %rax
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; SSE2-NEXT: addq $-1, %rsi
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; SSE2-NEXT: movq %rsi, (%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %r15d
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; SSE2-NEXT: adcq $-1, %r15
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %r15
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; SSE2-NEXT: movl $0, %eax
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; SSE2-NEXT: adcq $-1, %rax
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %r14
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; SSE2-NEXT: movl $0, %eax
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; SSE2-NEXT: adcq $-1, %rax
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %r8
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; SSE2-NEXT: movq %r8, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %r14d
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; SSE2-NEXT: adcq $-1, %r14
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; SSE2-NEXT: addq $-1, %r10
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; SSE2-NEXT: movq %r10, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %esi
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; SSE2-NEXT: adcq $-1, %rsi
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; SSE2-NEXT: movq %rsi, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %r10 # 8-byte Reload
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; SSE2-NEXT: addq $-1, %r10
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; SSE2-NEXT: movl $0, %esi
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; SSE2-NEXT: adcq $-1, %rsi
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; SSE2-NEXT: movq %rsi, %r8
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; SSE2-NEXT: addq $-1, %r13
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; SSE2-NEXT: movl $0, %esi
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; SSE2-NEXT: adcq $-1, %rsi
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; SSE2-NEXT: movq %rsi, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %rcx
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; SSE2-NEXT: movl $0, %esi
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; SSE2-NEXT: adcq $-1, %rsi
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; SSE2-NEXT: movl $0, %ebp
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; SSE2-NEXT: adcq $-1, %rbp
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; SSE2-NEXT: addq $-1, %r9
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; SSE2-NEXT: movq %r9, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %r9d
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; SSE2-NEXT: adcq $-1, %r9
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; SSE2-NEXT: addq $-1, %rbp
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; SSE2-NEXT: movq %rbp, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %r11d
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; SSE2-NEXT: adcq $-1, %r11
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; SSE2-NEXT: addq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: movl $0, %ebx
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; SSE2-NEXT: adcq $-1, %rbx
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; SSE2-NEXT: movq %rbx, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: movl $0, %ebp
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; SSE2-NEXT: adcq $-1, %rbp
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; SSE2-NEXT: addq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: movl $0, %ebx
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; SSE2-NEXT: adcq $-1, %rbx
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; SSE2-NEXT: addq $-1, %rbx
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; SSE2-NEXT: movq %rbx, {{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: movl $0, %ebx
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; SSE2-NEXT: adcq $-1, %rbx
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; SSE2-NEXT: addq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: movl $0, %eax
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; SSE2-NEXT: adcq $-1, %rax
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: movl $0, %eax
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; SSE2-NEXT: adcq $-1, %rax
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; SSE2-NEXT: addq $-1, %rdx
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; SSE2-NEXT: movl $0, %eax
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; SSE2-NEXT: adcq $-1, %rax
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; SSE2-NEXT: addq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: adcq $-1, -{{[0-9]+}}(%rsp) # 8-byte Folded Spill
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; SSE2-NEXT: shldq $63, %rcx, %rsi
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rbx # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %r13, %rbx
|
||||
; SSE2-NEXT: shldq $63, %r10, %r8
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %r10 # 8-byte Reload
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rcx, %r10
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rcx, %r14
|
||||
; SSE2-NEXT: movq (%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rcx, %r15
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rcx, %rdi
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rcx, %rdx
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rcx, %r12
|
||||
; SSE2-NEXT: movq %r12, %xmm11
|
||||
; SSE2-NEXT: movq %rdx, %xmm5
|
||||
; SSE2-NEXT: movq %rdi, %xmm13
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %rax, %rcx
|
||||
; SSE2-NEXT: movq %rcx, %xmm15
|
||||
; SSE2-NEXT: shrq %rax
|
||||
; SSE2-NEXT: movq %rax, %xmm8
|
||||
; SSE2-NEXT: movq %r15, %xmm9
|
||||
; SSE2-NEXT: movq %r14, %xmm6
|
||||
; SSE2-NEXT: movq %r10, %xmm7
|
||||
; SSE2-NEXT: movq %r8, %xmm0
|
||||
; SSE2-NEXT: shldq $63, %rdx, %rax
|
||||
; SSE2-NEXT: movq %rax, %rdx
|
||||
; SSE2-NEXT: shldq $63, %r8, %rbp
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %r8 # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %r14, %r8
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %r14 # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %r15, %r14
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %r15 # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %r13, %r15
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rax, %r12
|
||||
; SSE2-NEXT: movq (%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rax, %r11
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rax, %r10
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rax, %rsi
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shldq $63, %rax, %rdi
|
||||
; SSE2-NEXT: movq %rdi, %xmm11
|
||||
; SSE2-NEXT: movq %rsi, %xmm5
|
||||
; SSE2-NEXT: movq %r10, %xmm13
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %rcx, %rax
|
||||
; SSE2-NEXT: movq %rax, %xmm15
|
||||
; SSE2-NEXT: shrq %rcx
|
||||
; SSE2-NEXT: movq %rcx, %xmm8
|
||||
; SSE2-NEXT: movq %r11, %xmm9
|
||||
; SSE2-NEXT: movq %r12, %xmm6
|
||||
; SSE2-NEXT: movq %r15, %xmm7
|
||||
; SSE2-NEXT: movq %r14, %xmm0
|
||||
; SSE2-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp) # 16-byte Spill
|
||||
; SSE2-NEXT: movq %rbx, %xmm10
|
||||
; SSE2-NEXT: movq %rsi, %xmm4
|
||||
; SSE2-NEXT: movq %r8, %xmm10
|
||||
; SSE2-NEXT: movq %rbp, %xmm4
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %r9, %rax
|
||||
; SSE2-NEXT: movq %rax, %xmm1
|
||||
; SSE2-NEXT: shrq %r9
|
||||
; SSE2-NEXT: movq %r9, %xmm12
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %r11, %rax
|
||||
; SSE2-NEXT: shrdq $1, %rbx, %rax
|
||||
; SSE2-NEXT: movq %rax, %xmm2
|
||||
; SSE2-NEXT: shrq %r11
|
||||
; SSE2-NEXT: movq %r11, %xmm14
|
||||
; SSE2-NEXT: shrq %rbx
|
||||
; SSE2-NEXT: movq %rbx, %xmm14
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %rcx, %rax
|
||||
; SSE2-NEXT: movq %rax, %xmm3
|
||||
; SSE2-NEXT: movq %rcx, %rax
|
||||
; SSE2-NEXT: shrq %rax
|
||||
; SSE2-NEXT: movq %rcx, %rbp
|
||||
; SSE2-NEXT: shrq %rbp
|
||||
; SSE2-NEXT: pslldq {{.*#+}} xmm11 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm11[0]
|
||||
; SSE2-NEXT: pslldq {{.*#+}} xmm5 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm5[0,1]
|
||||
; SSE2-NEXT: pand {{.*}}(%rip), %xmm5
|
||||
; SSE2-NEXT: por %xmm11, %xmm5
|
||||
; SSE2-NEXT: movq %rax, %xmm11
|
||||
; SSE2-NEXT: movq %rbp, %xmm11
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: movq %rbp, %rcx
|
||||
; SSE2-NEXT: shrdq $1, %rbp, %rax
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %rcx, %rax
|
||||
; SSE2-NEXT: pslldq {{.*#+}} xmm13 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm13[0,1,2]
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm15 = xmm15[0],xmm8[0]
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255]
|
||||
|
|
@ -2236,17 +2232,16 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind
|
|||
; SSE2-NEXT: pand %xmm13, %xmm0
|
||||
; SSE2-NEXT: pandn %xmm5, %xmm13
|
||||
; SSE2-NEXT: movq %rcx, %xmm15
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %rcx, %rax
|
||||
; SSE2-NEXT: por %xmm0, %xmm13
|
||||
; SSE2-NEXT: pslldq {{.*#+}} xmm9 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm9[0,1,2,3,4]
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255]
|
||||
; SSE2-NEXT: pslldq {{.*#+}} xmm6 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm6[0,1,2,3,4,5]
|
||||
; SSE2-NEXT: pand %xmm0, %xmm6
|
||||
; SSE2-NEXT: pandn %xmm9, %xmm0
|
||||
; SSE2-NEXT: movq %rax, %xmm9
|
||||
; SSE2-NEXT: shrq %rcx
|
||||
; SSE2-NEXT: movq %rdx, %xmm9
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %rax, %rcx
|
||||
; SSE2-NEXT: por %xmm6, %xmm0
|
||||
; SSE2-NEXT: pslldq {{.*#+}} xmm7 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm7[0,1,2,3,4,5,6]
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255]
|
||||
|
|
@ -2255,31 +2250,27 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind
|
|||
; SSE2-NEXT: pand %xmm6, %xmm5
|
||||
; SSE2-NEXT: pandn %xmm7, %xmm6
|
||||
; SSE2-NEXT: movq %rcx, %xmm7
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
|
||||
; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx # 8-byte Reload
|
||||
; SSE2-NEXT: shrdq $1, %rax, %rcx
|
||||
; SSE2-NEXT: shrq %rax
|
||||
; SSE2-NEXT: por %xmm5, %xmm6
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [65535,65535,65535,65535,65535,0,65535,65535]
|
||||
; SSE2-NEXT: pand %xmm5, %xmm6
|
||||
; SSE2-NEXT: pandn %xmm0, %xmm5
|
||||
; SSE2-NEXT: movq %rcx, %xmm0
|
||||
; SSE2-NEXT: shrq %rax
|
||||
; SSE2-NEXT: movq %rax, %xmm0
|
||||
; SSE2-NEXT: por %xmm6, %xmm5
|
||||
; SSE2-NEXT: movq %rax, %xmm6
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,1,2,2]
|
||||
; SSE2-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm13[2],xmm5[3],xmm13[3]
|
||||
; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm10[0],xmm4[1],xmm10[1],xmm4[2],xmm10[2],xmm4[3],xmm10[3],xmm4[4],xmm10[4],xmm4[5],xmm10[5],xmm4[6],xmm10[6],xmm4[7],xmm10[7]
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm12[0]
|
||||
; SSE2-NEXT: pslld $24, %xmm1
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm14[0]
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255]
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255]
|
||||
; SSE2-NEXT: pslld $16, %xmm2
|
||||
; SSE2-NEXT: pand %xmm10, %xmm2
|
||||
; SSE2-NEXT: pandn %xmm1, %xmm10
|
||||
; SSE2-NEXT: por %xmm2, %xmm10
|
||||
; SSE2-NEXT: pand %xmm6, %xmm2
|
||||
; SSE2-NEXT: pandn %xmm1, %xmm6
|
||||
; SSE2-NEXT: por %xmm2, %xmm6
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65535,0,65535,65535,65535,65535,65535,65535]
|
||||
; SSE2-NEXT: pand %xmm1, %xmm4
|
||||
; SSE2-NEXT: pandn %xmm10, %xmm1
|
||||
; SSE2-NEXT: pandn %xmm6, %xmm1
|
||||
; SSE2-NEXT: por %xmm4, %xmm1
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm11[0]
|
||||
; SSE2-NEXT: psllq $56, %xmm3
|
||||
|
|
@ -2290,18 +2281,17 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind
|
|||
; SSE2-NEXT: pandn %xmm3, %xmm2
|
||||
; SSE2-NEXT: por %xmm8, %xmm2
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [65535,65535,65535,0,65535,65535,65535,65535]
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm9 = xmm9[0],xmm7[0]
|
||||
; SSE2-NEXT: psllq $40, %xmm9
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255]
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm6[0]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
|
||||
; SSE2-NEXT: pand %xmm4, %xmm0
|
||||
; SSE2-NEXT: pandn %xmm9, %xmm4
|
||||
; SSE2-NEXT: por %xmm0, %xmm4
|
||||
; SSE2-NEXT: pand %xmm3, %xmm4
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm9[0,0,1,1]
|
||||
; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255]
|
||||
; SSE2-NEXT: pand %xmm6, %xmm4
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm0[0]
|
||||
; SSE2-NEXT: psllq $40, %xmm7
|
||||
; SSE2-NEXT: pandn %xmm7, %xmm6
|
||||
; SSE2-NEXT: por %xmm4, %xmm6
|
||||
; SSE2-NEXT: pand %xmm3, %xmm6
|
||||
; SSE2-NEXT: pandn %xmm2, %xmm3
|
||||
; SSE2-NEXT: por %xmm3, %xmm4
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,2,3]
|
||||
; SSE2-NEXT: por %xmm6, %xmm3
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,2,3]
|
||||
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
|
||||
; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm1[0],xmm5[1]
|
||||
; SSE2-NEXT: movupd %xmm5, (%rax)
|
||||
|
|
|
|||
|
|
@ -637,42 +637,28 @@ define void @build_v4i16_012u(x86_mmx *%p0, i16 %a0, i16 %a1, i16 %a2, i16 %a3)
|
|||
; X86-SSE-NEXT: popl %ebp
|
||||
; X86-SSE-NEXT: retl
|
||||
;
|
||||
; X64-SSE2-LABEL: build_v4i16_012u:
|
||||
; X64-SSE2: # %bb.0:
|
||||
; X64-SSE2-NEXT: movd %edx, %xmm0
|
||||
; X64-SSE2-NEXT: movd %esi, %xmm1
|
||||
; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
|
||||
; X64-SSE2-NEXT: movd %ecx, %xmm0
|
||||
; X64-SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
|
||||
; X64-SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[0,2,2,3,4,5,6,7]
|
||||
; X64-SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
|
||||
; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; X64-SSE2-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-SSE2-NEXT: paddd %mm0, %mm0
|
||||
; X64-SSE2-NEXT: movq %mm0, (%rdi)
|
||||
; X64-SSE2-NEXT: retq
|
||||
;
|
||||
; X64-SSSE3-LABEL: build_v4i16_012u:
|
||||
; X64-SSSE3: # %bb.0:
|
||||
; X64-SSSE3-NEXT: movd %edx, %xmm0
|
||||
; X64-SSSE3-NEXT: movd %esi, %xmm1
|
||||
; X64-SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
|
||||
; X64-SSSE3-NEXT: movd %ecx, %xmm0
|
||||
; X64-SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
|
||||
; X64-SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; X64-SSSE3-NEXT: movq %xmm1, -{{[0-9]+}}(%rsp)
|
||||
; X64-SSSE3-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-SSSE3-NEXT: paddd %mm0, %mm0
|
||||
; X64-SSSE3-NEXT: movq %mm0, (%rdi)
|
||||
; X64-SSSE3-NEXT: retq
|
||||
; X64-SSE-LABEL: build_v4i16_012u:
|
||||
; X64-SSE: # %bb.0:
|
||||
; X64-SSE-NEXT: movd %edx, %xmm0
|
||||
; X64-SSE-NEXT: movd %esi, %xmm1
|
||||
; X64-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
|
||||
; X64-SSE-NEXT: movd %ecx, %xmm0
|
||||
; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
|
||||
; X64-SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[0,2,2,3,4,5,6,7]
|
||||
; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; X64-SSE-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-SSE-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-SSE-NEXT: paddd %mm0, %mm0
|
||||
; X64-SSE-NEXT: movq %mm0, (%rdi)
|
||||
; X64-SSE-NEXT: retq
|
||||
;
|
||||
; X64-AVX-LABEL: build_v4i16_012u:
|
||||
; X64-AVX: # %bb.0:
|
||||
; X64-AVX-NEXT: vmovd %esi, %xmm0
|
||||
; X64-AVX-NEXT: vpinsrd $1, %edx, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; X64-AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; X64-AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; X64-AVX-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-AVX-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-AVX-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -762,7 +748,7 @@ define void @build_v4i16_0u00(x86_mmx *%p0, i16 %a0, i16 %a1, i16 %a2, i16 %a3)
|
|||
; X64-SSSE3-LABEL: build_v4i16_0u00:
|
||||
; X64-SSSE3: # %bb.0:
|
||||
; X64-SSSE3-NEXT: movd %esi, %xmm0
|
||||
; X64-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,u,u,0,1,0,1,0,1,0,1,0,1,2,3]
|
||||
; X64-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,2,3,0,1,0,1,0,1,0,1,0,1,2,3]
|
||||
; X64-SSSE3-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-SSSE3-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-SSSE3-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -772,7 +758,7 @@ define void @build_v4i16_0u00(x86_mmx *%p0, i16 %a0, i16 %a1, i16 %a2, i16 %a3)
|
|||
; X64-AVX1-LABEL: build_v4i16_0u00:
|
||||
; X64-AVX1: # %bb.0:
|
||||
; X64-AVX1-NEXT: vmovd %esi, %xmm0
|
||||
; X64-AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,u,u,0,1,0,1,0,1,0,1,0,1,2,3]
|
||||
; X64-AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,2,3,0,1,0,1,0,1,0,1,0,1,2,3]
|
||||
; X64-AVX1-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-AVX1-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-AVX1-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -783,7 +769,8 @@ define void @build_v4i16_0u00(x86_mmx *%p0, i16 %a0, i16 %a1, i16 %a2, i16 %a3)
|
|||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: vmovd %esi, %xmm0
|
||||
; X64-AVX2-NEXT: vpbroadcastd %xmm0, %xmm0
|
||||
; X64-AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; X64-AVX2-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
|
||||
; X64-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; X64-AVX2-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-AVX2-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-AVX2-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -794,7 +781,8 @@ define void @build_v4i16_0u00(x86_mmx *%p0, i16 %a0, i16 %a1, i16 %a2, i16 %a3)
|
|||
; X64-AVX512: # %bb.0:
|
||||
; X64-AVX512-NEXT: vmovd %esi, %xmm0
|
||||
; X64-AVX512-NEXT: vpbroadcastd %xmm0, %xmm0
|
||||
; X64-AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; X64-AVX512-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
|
||||
; X64-AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; X64-AVX512-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-AVX512-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-AVX512-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -1029,7 +1017,7 @@ define void @build_v8i8_0u2345z7(x86_mmx *%p0, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i
|
|||
; X86-SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
|
||||
; X86-SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; X86-SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
|
||||
; X86-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0],zero,xmm0[4,6,8,10],zero,xmm0[14,u,u,u,u,u,u,u,u]
|
||||
; X86-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,u,4,6,8,10],zero,xmm0[14,u,u,u,u,u,u,u,u]
|
||||
; X86-SSSE3-NEXT: movq %xmm0, (%esp)
|
||||
; X86-SSSE3-NEXT: movq (%esp), %mm0
|
||||
; X86-SSSE3-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -1076,7 +1064,7 @@ define void @build_v8i8_0u2345z7(x86_mmx *%p0, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i
|
|||
; X64-SSSE3-NEXT: movd %esi, %xmm1
|
||||
; X64-SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
|
||||
; X64-SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
|
||||
; X64-SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[4,6,8,10],zero,xmm1[14,u,u,u,u,u,u,u,u]
|
||||
; X64-SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0,u,4,6,8,10],zero,xmm1[14,u,u,u,u,u,u,u,u]
|
||||
; X64-SSSE3-NEXT: movq %xmm1, -{{[0-9]+}}(%rsp)
|
||||
; X64-SSSE3-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-SSSE3-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -1094,7 +1082,7 @@ define void @build_v8i8_0u2345z7(x86_mmx *%p0, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i
|
|||
; X64-AVX-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: movl {{[0-9]+}}(%rsp), %eax
|
||||
; X64-AVX-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,xmm0[4,6,8,10],zero,xmm0[14,u,u,u,u,u,u,u,u]
|
||||
; X64-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,u,4,6,8,10],zero,xmm0[14,u,u,u,u,u,u,u,u]
|
||||
; X64-AVX-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-AVX-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-AVX-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -1186,7 +1174,7 @@ define void @build_v8i8_0123zzzu(x86_mmx *%p0, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i
|
|||
; X86-SSSE3-NEXT: pinsrw $2, %ecx, %xmm0
|
||||
; X86-SSSE3-NEXT: movl 24(%ebp), %ecx
|
||||
; X86-SSSE3-NEXT: pinsrw $3, %ecx, %xmm0
|
||||
; X86-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6],zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
|
||||
; X86-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6],zero,zero,zero,xmm0[u,u,u,u,u,u,u,u,u]
|
||||
; X86-SSSE3-NEXT: movq %xmm0, (%esp)
|
||||
; X86-SSSE3-NEXT: movq (%esp), %mm0
|
||||
; X86-SSSE3-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -1217,7 +1205,7 @@ define void @build_v8i8_0123zzzu(x86_mmx *%p0, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i
|
|||
; X64-SSSE3-NEXT: pinsrw $1, %edx, %xmm0
|
||||
; X64-SSSE3-NEXT: pinsrw $2, %ecx, %xmm0
|
||||
; X64-SSSE3-NEXT: pinsrw $3, %r8d, %xmm0
|
||||
; X64-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6],zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
|
||||
; X64-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6],zero,zero,zero,xmm0[u,u,u,u,u,u,u,u,u]
|
||||
; X64-SSSE3-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-SSSE3-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-SSSE3-NEXT: paddd %mm0, %mm0
|
||||
|
|
@ -1231,7 +1219,7 @@ define void @build_v8i8_0123zzzu(x86_mmx *%p0, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i
|
|||
; X64-AVX-NEXT: vpinsrw $1, %edx, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpinsrw $3, %r8d, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6],zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
|
||||
; X64-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6],zero,zero,zero,xmm0[u,u,u,u,u,u,u,u,u]
|
||||
; X64-AVX-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-AVX-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
|
||||
; X64-AVX-NEXT: paddd %mm0, %mm0
|
||||
|
|
|
|||
|
|
@ -325,7 +325,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8> %b, <7 x i8>* %p) nounwind {
|
|||
; SSE42-NEXT: pextrb $0, %xmm1, 6(%rdi)
|
||||
; SSE42-NEXT: pshufb {{.*#+}} xmm1 = xmm1[8,9,8,9,4,5,8,9,0,1,12,13,0,1,14,15]
|
||||
; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5,6,7]
|
||||
; SSE42-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
|
||||
; SSE42-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0,2,4,6,8,10,12,u,u,u,u,u,u,u,u,u]
|
||||
; SSE42-NEXT: pextrw $2, %xmm1, 4(%rdi)
|
||||
; SSE42-NEXT: movd %xmm1, (%rdi)
|
||||
; SSE42-NEXT: retq
|
||||
|
|
@ -335,7 +335,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8> %b, <7 x i8>* %p) nounwind {
|
|||
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,1,3]
|
||||
; AVX-NEXT: vpshufb {{.*#+}} xmm2 = xmm1[8,9,8,9,4,5,8,9,0,1,12,13,0,1,14,15]
|
||||
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5,6,7]
|
||||
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
|
||||
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,u,u,u,u,u,u,u,u,u]
|
||||
; AVX-NEXT: vpextrb $0, %xmm1, 6(%rdi)
|
||||
; AVX-NEXT: vpextrw $2, %xmm0, 4(%rdi)
|
||||
; AVX-NEXT: vmovd %xmm0, (%rdi)
|
||||
|
|
@ -343,7 +343,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8> %b, <7 x i8>* %p) nounwind {
|
|||
;
|
||||
; XOP-LABEL: v7i8:
|
||||
; XOP: # %bb.0:
|
||||
; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0],xmm1[8],xmm0[12],xmm1[8],xmm0[4],xmm1[12,0,14,u,u,u,u,u,u,u,u]
|
||||
; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0],xmm1[8],xmm0[12],xmm1[8],xmm0[4],xmm1[12,0,u,u,u,u,u,u,u,u,u]
|
||||
; XOP-NEXT: vpextrb $0, %xmm1, 6(%rdi)
|
||||
; XOP-NEXT: vpextrw $2, %xmm0, 4(%rdi)
|
||||
; XOP-NEXT: vmovd %xmm0, (%rdi)
|
||||
|
|
|
|||
|
|
@ -18,13 +18,8 @@ define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
|
|||
;
|
||||
; X64-LABEL: mmx_movzl:
|
||||
; X64: ## %bb.0:
|
||||
; X64-NEXT: movdq2q %xmm0, %mm0
|
||||
; X64-NEXT: movq %mm0, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero
|
||||
; X64-NEXT: movl $32, %eax
|
||||
; X64-NEXT: pinsrq $0, %rax, %xmm1
|
||||
; X64-NEXT: pxor %xmm0, %xmm0
|
||||
; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
|
||||
; X64-NEXT: movq %rax, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%tmp = bitcast x86_mmx %x to <2 x i32>
|
||||
%tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0
|
||||
|
|
|
|||
|
|
@ -844,18 +844,17 @@ define <4 x double> @uitofp_4i32_to_4f64(<4 x i32> %a) {
|
|||
; SSE-NEXT: cvtdq2pd %xmm1, %xmm1
|
||||
; SSE-NEXT: movapd {{.*#+}} xmm2 = [6.553600e+04,6.553600e+04]
|
||||
; SSE-NEXT: mulpd %xmm2, %xmm1
|
||||
; SSE-NEXT: movdqa {{.*#+}} xmm3 = [65535,0,65535,0,65535,0,65535,0]
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1]
|
||||
; SSE-NEXT: pand %xmm3, %xmm0
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
|
||||
; SSE-NEXT: pand {{.*}}(%rip), %xmm0
|
||||
; SSE-NEXT: cvtdq2pd %xmm0, %xmm0
|
||||
; SSE-NEXT: addpd %xmm1, %xmm0
|
||||
; SSE-NEXT: movdqa %xmm4, %xmm1
|
||||
; SSE-NEXT: movdqa %xmm3, %xmm1
|
||||
; SSE-NEXT: psrld $16, %xmm1
|
||||
; SSE-NEXT: cvtdq2pd %xmm1, %xmm5
|
||||
; SSE-NEXT: mulpd %xmm2, %xmm5
|
||||
; SSE-NEXT: pand %xmm3, %xmm4
|
||||
; SSE-NEXT: cvtdq2pd %xmm4, %xmm1
|
||||
; SSE-NEXT: addpd %xmm5, %xmm1
|
||||
; SSE-NEXT: cvtdq2pd %xmm1, %xmm4
|
||||
; SSE-NEXT: mulpd %xmm2, %xmm4
|
||||
; SSE-NEXT: pand {{.*}}(%rip), %xmm3
|
||||
; SSE-NEXT: cvtdq2pd %xmm3, %xmm1
|
||||
; SSE-NEXT: addpd %xmm4, %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: uitofp_4i32_to_4f64:
|
||||
|
|
@ -2927,7 +2926,7 @@ define <2 x double> @uitofp_load_2i32_to_2f64(<2 x i32> *%a) {
|
|||
; SSE-LABEL: uitofp_load_2i32_to_2f64:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
|
||||
; SSE-NEXT: movdqa {{.*#+}} xmm1 = [65535,0,65535,0,65535,0,65535,0]
|
||||
; SSE-NEXT: movdqa {{.*#+}} xmm1 = [65535,0,65535,0,0,0,0,0]
|
||||
; SSE-NEXT: pand %xmm0, %xmm1
|
||||
; SSE-NEXT: cvtdq2pd %xmm1, %xmm1
|
||||
; SSE-NEXT: psrld $16, %xmm0
|
||||
|
|
@ -2940,7 +2939,7 @@ define <2 x double> @uitofp_load_2i32_to_2f64(<2 x i32> *%a) {
|
|||
; VEX: # %bb.0:
|
||||
; VEX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
|
||||
; VEX-NEXT: vpxor %xmm1, %xmm1, %xmm1
|
||||
; VEX-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7]
|
||||
; VEX-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3,4,5,6,7]
|
||||
; VEX-NEXT: vcvtdq2pd %xmm1, %xmm1
|
||||
; VEX-NEXT: vpsrld $16, %xmm0, %xmm0
|
||||
; VEX-NEXT: vcvtdq2pd %xmm0, %xmm0
|
||||
|
|
@ -3129,18 +3128,17 @@ define <4 x double> @uitofp_load_4i32_to_4f64(<4 x i32> *%a) {
|
|||
; SSE-NEXT: cvtdq2pd %xmm1, %xmm1
|
||||
; SSE-NEXT: movapd {{.*#+}} xmm2 = [6.553600e+04,6.553600e+04]
|
||||
; SSE-NEXT: mulpd %xmm2, %xmm1
|
||||
; SSE-NEXT: movdqa {{.*#+}} xmm3 = [65535,0,65535,0,65535,0,65535,0]
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1]
|
||||
; SSE-NEXT: pand %xmm3, %xmm0
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
|
||||
; SSE-NEXT: pand {{.*}}(%rip), %xmm0
|
||||
; SSE-NEXT: cvtdq2pd %xmm0, %xmm0
|
||||
; SSE-NEXT: addpd %xmm1, %xmm0
|
||||
; SSE-NEXT: movdqa %xmm4, %xmm1
|
||||
; SSE-NEXT: movdqa %xmm3, %xmm1
|
||||
; SSE-NEXT: psrld $16, %xmm1
|
||||
; SSE-NEXT: cvtdq2pd %xmm1, %xmm5
|
||||
; SSE-NEXT: mulpd %xmm2, %xmm5
|
||||
; SSE-NEXT: pand %xmm3, %xmm4
|
||||
; SSE-NEXT: cvtdq2pd %xmm4, %xmm1
|
||||
; SSE-NEXT: addpd %xmm5, %xmm1
|
||||
; SSE-NEXT: cvtdq2pd %xmm1, %xmm4
|
||||
; SSE-NEXT: mulpd %xmm2, %xmm4
|
||||
; SSE-NEXT: pand {{.*}}(%rip), %xmm3
|
||||
; SSE-NEXT: cvtdq2pd %xmm3, %xmm1
|
||||
; SSE-NEXT: addpd %xmm4, %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: uitofp_load_4i32_to_4f64:
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1863,7 +1863,7 @@ define <4 x float> @shuffle_v4f32_bitcast_4401(<4 x float> %a, <4 x i32> %b) {
|
|||
;
|
||||
; AVX512VL-LABEL: shuffle_v4f32_bitcast_4401:
|
||||
; AVX512VL: # %bb.0:
|
||||
; AVX512VL-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,1]
|
||||
; AVX512VL-NEXT: vbroadcastss %xmm1, %xmm1
|
||||
; AVX512VL-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
|
||||
; AVX512VL-NEXT: retq
|
||||
%1 = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
|
||||
|
|
|
|||
|
|
@ -2536,33 +2536,20 @@ define <8 x i16> @insert_dup_mem_v8i16_i32(i32* %ptr) {
|
|||
}
|
||||
|
||||
define <8 x i16> @insert_dup_mem_v8i16_sext_i16(i16* %ptr) {
|
||||
; SSE2-LABEL: insert_dup_mem_v8i16_sext_i16:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: movswl (%rdi), %eax
|
||||
; SSE2-NEXT: movd %eax, %xmm0
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: insert_dup_mem_v8i16_sext_i16:
|
||||
; SSSE3: # %bb.0:
|
||||
; SSSE3-NEXT: movswl (%rdi), %eax
|
||||
; SSSE3-NEXT: movd %eax, %xmm0
|
||||
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
|
||||
; SSSE3-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: insert_dup_mem_v8i16_sext_i16:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: movswl (%rdi), %eax
|
||||
; SSE41-NEXT: movd %eax, %xmm0
|
||||
; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
|
||||
; SSE41-NEXT: retq
|
||||
; SSE-LABEL: insert_dup_mem_v8i16_sext_i16:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: movswl (%rdi), %eax
|
||||
; SSE-NEXT: movd %eax, %xmm0
|
||||
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: insert_dup_mem_v8i16_sext_i16:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: movswl (%rdi), %eax
|
||||
; AVX1-NEXT: vmovd %eax, %xmm0
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
|
||||
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
|
||||
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: insert_dup_mem_v8i16_sext_i16:
|
||||
|
|
@ -2615,8 +2602,7 @@ define <8 x i16> @insert_dup_elt3_mem_v8i16_i32(i32* %ptr) {
|
|||
; SSE2-LABEL: insert_dup_elt3_mem_v8i16_i32:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,3,2,3,4,5,6,7]
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,1,0,1,4,5,6,7]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
|
|
@ -2650,33 +2636,20 @@ define <8 x i16> @insert_dup_elt3_mem_v8i16_i32(i32* %ptr) {
|
|||
}
|
||||
|
||||
define <8 x i16> @insert_dup_elt1_mem_v8i16_sext_i16(i16* %ptr) {
|
||||
; SSE2-LABEL: insert_dup_elt1_mem_v8i16_sext_i16:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: movswl (%rdi), %eax
|
||||
; SSE2-NEXT: movd %eax, %xmm0
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,1,2,3,4,5,6,7]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: insert_dup_elt1_mem_v8i16_sext_i16:
|
||||
; SSSE3: # %bb.0:
|
||||
; SSSE3-NEXT: movswl (%rdi), %eax
|
||||
; SSSE3-NEXT: movd %eax, %xmm0
|
||||
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3]
|
||||
; SSSE3-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: insert_dup_elt1_mem_v8i16_sext_i16:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: movswl (%rdi), %eax
|
||||
; SSE41-NEXT: movd %eax, %xmm0
|
||||
; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3]
|
||||
; SSE41-NEXT: retq
|
||||
; SSE-LABEL: insert_dup_elt1_mem_v8i16_sext_i16:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: movswl (%rdi), %eax
|
||||
; SSE-NEXT: movd %eax, %xmm0
|
||||
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,1,2,3,4,5,6,7]
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: insert_dup_elt1_mem_v8i16_sext_i16:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: movswl (%rdi), %eax
|
||||
; AVX1-NEXT: vmovd %eax, %xmm0
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3]
|
||||
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,2,3,4,5,6,7]
|
||||
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: insert_dup_elt1_mem_v8i16_sext_i16:
|
||||
|
|
@ -2706,8 +2679,7 @@ define <8 x i16> @insert_dup_elt3_mem_v8i16_sext_i16(i16* %ptr) {
|
|||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: movswl (%rdi), %eax
|
||||
; SSE2-NEXT: movd %eax, %xmm0
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,3,2,3,4,5,6,7]
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,1,0,1,4,5,6,7]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
|
|
|
|||
|
|
@ -4604,7 +4604,8 @@ define <16 x i16> @insert_dup_mem_v16i16_i32(i32* %ptr) {
|
|||
; AVX1-LABEL: insert_dup_mem_v16i16_i32:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
|
||||
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
|
||||
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
|
|
@ -4624,7 +4625,8 @@ define <16 x i16> @insert_dup_mem_v16i16_sext_i16(i16* %ptr) {
|
|||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: movswl (%rdi), %eax
|
||||
; AVX1-NEXT: vmovd %eax, %xmm0
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
|
||||
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
|
||||
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
|
|
@ -4652,7 +4654,8 @@ define <16 x i16> @insert_dup_elt1_mem_v16i16_i32(i32* %ptr) #0 {
|
|||
; AVX1-LABEL: insert_dup_elt1_mem_v16i16_i32:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3]
|
||||
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,2,3,4,5,6,7]
|
||||
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
|
||||
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
|
|
|
|||
Loading…
Reference in New Issue