forked from OSchip/llvm-project
Add argument registers to the end of call operand list (partial fix).
llvm-svn: 28783
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f0a7a1a117
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ca25486603
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@ -617,6 +617,13 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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std::vector<SDOperand> Ops;
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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Ops.push_back(Callee);
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// Add argument registers to the end of the list so that they are known live
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// into the call.
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
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Ops.push_back(DAG.getRegister(RegsToPass[i].first,
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RegsToPass[i].second.getValueType()));
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if (InFlag.Val)
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if (InFlag.Val)
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Ops.push_back(InFlag);
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Ops.push_back(InFlag);
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@ -985,7 +992,7 @@ X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) {
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return DAG.getNode(ISD::MERGE_VALUES, RetVTs, ArgValues);
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return DAG.getNode(ISD::MERGE_VALUES, RetVTs, ArgValues);
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}
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}
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SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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SDOperand Chain = Op.getOperand(0);
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SDOperand Chain = Op.getOperand(0);
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unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue();
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unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue();
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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@ -1139,6 +1146,13 @@ X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) {
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std::vector<SDOperand> Ops;
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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Ops.push_back(Callee);
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// Add argument registers to the end of the list so that they are known live
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// into the call.
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
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Ops.push_back(DAG.getRegister(RegsToPass[i].first,
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RegsToPass[i].second.getValueType()));
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if (InFlag.Val)
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if (InFlag.Val)
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Ops.push_back(InFlag);
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Ops.push_back(InFlag);
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