forked from OSchip/llvm-project
Remove redundant semicolons which are null statements.
llvm-svn: 163547
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76bb5cabfa
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ca1e27be0d
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@ -442,7 +442,7 @@ void LiveIntervals::computeIntervals() {
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// Compute the number of register mask instructions in this block.
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// Compute the number of register mask instructions in this block.
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std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB->getNumber()];
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std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB->getNumber()];
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RMB.second = RegMaskSlots.size() - RMB.first;;
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RMB.second = RegMaskSlots.size() - RMB.first;
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}
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}
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// Create empty intervals for registers defined by implicit_def's (except
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// Create empty intervals for registers defined by implicit_def's (except
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@ -499,7 +499,7 @@ void LiveIntervals::computeRegMasks() {
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RegMaskBits.push_back(MO->getRegMask());
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RegMaskBits.push_back(MO->getRegMask());
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}
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}
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// Compute the number of register mask instructions in this block.
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// Compute the number of register mask instructions in this block.
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RMB.second = RegMaskSlots.size() - RMB.first;;
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RMB.second = RegMaskSlots.size() - RMB.first;
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}
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}
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}
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}
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@ -220,7 +220,7 @@ unsigned StackColoring::collectMarkers(unsigned NumSlot) {
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FI != FE; ++FI) {
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FI != FE; ++FI) {
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// Assign a serial number to this basic block.
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// Assign a serial number to this basic block.
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BasicBlocks[*FI] = BasicBlockNumbering.size();;
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BasicBlocks[*FI] = BasicBlockNumbering.size();
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BasicBlockNumbering.push_back(*FI);
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BasicBlockNumbering.push_back(*FI);
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BlockLiveness[*FI].Begin.resize(NumSlot);
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BlockLiveness[*FI].Begin.resize(NumSlot);
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@ -203,7 +203,7 @@ bool ELFAsmParser::ParseDirectiveSize(StringRef, SMLoc) {
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StringRef Name;
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StringRef Name;
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if (getParser().ParseIdentifier(Name))
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if (getParser().ParseIdentifier(Name))
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return TokError("expected identifier in directive");
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return TokError("expected identifier in directive");
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MCSymbol *Sym = getContext().GetOrCreateSymbol(Name);;
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MCSymbol *Sym = getContext().GetOrCreateSymbol(Name);
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if (getLexer().isNot(AsmToken::Comma))
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if (getLexer().isNot(AsmToken::Comma))
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return TokError("unexpected token in directive");
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return TokError("unexpected token in directive");
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@ -410,7 +410,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
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if (Type == macho::RIT_ARM_Half) {
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if (Type == macho::RIT_ARM_Half) {
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// The other-half value only gets populated for the movt and movw
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// The other-half value only gets populated for the movt and movw
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// relocation entries.
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// relocation entries.
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uint32_t Value = 0;;
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uint32_t Value = 0;
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switch ((unsigned)Fixup.getKind()) {
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switch ((unsigned)Fixup.getKind()) {
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default: break;
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default: break;
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case ARM::fixup_arm_movw_lo16:
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case ARM::fixup_arm_movw_lo16:
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@ -213,7 +213,7 @@ const char *MipsAsmPrinter::getCurrentABIString() const {
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case MipsSubtarget::N32: return "abiN32";
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case MipsSubtarget::N32: return "abiN32";
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case MipsSubtarget::N64: return "abi64";
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case MipsSubtarget::N64: return "abi64";
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case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
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case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
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default: llvm_unreachable("Unknown Mips ABI");;
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default: llvm_unreachable("Unknown Mips ABI");
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}
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}
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}
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}
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@ -11024,7 +11024,7 @@ SDValue X86TargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op,
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LHS1 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, Extra);
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LHS1 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, Extra);
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LHS2 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, Extra);
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LHS2 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, Extra);
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return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, LHS1, LHS2);;
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return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, LHS1, LHS2);
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}
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}
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// fall through
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// fall through
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case MVT::v4i32:
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case MVT::v4i32:
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