Remove redundant semicolons which are null statements.

llvm-svn: 163547
This commit is contained in:
Dmitri Gribenko 2012-09-10 21:26:47 +00:00
parent 76bb5cabfa
commit ca1e27be0d
6 changed files with 7 additions and 7 deletions

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@ -442,7 +442,7 @@ void LiveIntervals::computeIntervals() {
// Compute the number of register mask instructions in this block. // Compute the number of register mask instructions in this block.
std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB->getNumber()]; std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB->getNumber()];
RMB.second = RegMaskSlots.size() - RMB.first;; RMB.second = RegMaskSlots.size() - RMB.first;
} }
// Create empty intervals for registers defined by implicit_def's (except // Create empty intervals for registers defined by implicit_def's (except
@ -499,7 +499,7 @@ void LiveIntervals::computeRegMasks() {
RegMaskBits.push_back(MO->getRegMask()); RegMaskBits.push_back(MO->getRegMask());
} }
// Compute the number of register mask instructions in this block. // Compute the number of register mask instructions in this block.
RMB.second = RegMaskSlots.size() - RMB.first;; RMB.second = RegMaskSlots.size() - RMB.first;
} }
} }

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@ -220,7 +220,7 @@ unsigned StackColoring::collectMarkers(unsigned NumSlot) {
FI != FE; ++FI) { FI != FE; ++FI) {
// Assign a serial number to this basic block. // Assign a serial number to this basic block.
BasicBlocks[*FI] = BasicBlockNumbering.size();; BasicBlocks[*FI] = BasicBlockNumbering.size();
BasicBlockNumbering.push_back(*FI); BasicBlockNumbering.push_back(*FI);
BlockLiveness[*FI].Begin.resize(NumSlot); BlockLiveness[*FI].Begin.resize(NumSlot);

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@ -203,7 +203,7 @@ bool ELFAsmParser::ParseDirectiveSize(StringRef, SMLoc) {
StringRef Name; StringRef Name;
if (getParser().ParseIdentifier(Name)) if (getParser().ParseIdentifier(Name))
return TokError("expected identifier in directive"); return TokError("expected identifier in directive");
MCSymbol *Sym = getContext().GetOrCreateSymbol(Name);; MCSymbol *Sym = getContext().GetOrCreateSymbol(Name);
if (getLexer().isNot(AsmToken::Comma)) if (getLexer().isNot(AsmToken::Comma))
return TokError("unexpected token in directive"); return TokError("unexpected token in directive");

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@ -410,7 +410,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
if (Type == macho::RIT_ARM_Half) { if (Type == macho::RIT_ARM_Half) {
// The other-half value only gets populated for the movt and movw // The other-half value only gets populated for the movt and movw
// relocation entries. // relocation entries.
uint32_t Value = 0;; uint32_t Value = 0;
switch ((unsigned)Fixup.getKind()) { switch ((unsigned)Fixup.getKind()) {
default: break; default: break;
case ARM::fixup_arm_movw_lo16: case ARM::fixup_arm_movw_lo16:

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@ -213,7 +213,7 @@ const char *MipsAsmPrinter::getCurrentABIString() const {
case MipsSubtarget::N32: return "abiN32"; case MipsSubtarget::N32: return "abiN32";
case MipsSubtarget::N64: return "abi64"; case MipsSubtarget::N64: return "abi64";
case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64 case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
default: llvm_unreachable("Unknown Mips ABI");; default: llvm_unreachable("Unknown Mips ABI");
} }
} }

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@ -11024,7 +11024,7 @@ SDValue X86TargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op,
LHS1 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, Extra); LHS1 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, Extra);
LHS2 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, Extra); LHS2 = DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, Extra);
return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, LHS1, LHS2);; return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, LHS1, LHS2);
} }
// fall through // fall through
case MVT::v4i32: case MVT::v4i32: