forked from OSchip/llvm-project
Fix vector macros to correctly check argument types. <rdar://problem/10261670>
llvm-svn: 143792
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@ -337,19 +337,23 @@ _mm256_dp_ps(__m256 a, __m256 b, const int c)
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}
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/* Vector shuffle */
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#define _mm256_shuffle_ps(a, b, mask) \
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(__builtin_shufflevector((__v8sf)(a), (__v8sf)(b), \
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#define _mm256_shuffle_ps(a, b, mask) __extension__ ({ \
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__m256 __a = (a); \
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__m256 __b = (b); \
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(__m256)__builtin_shufflevector((__v8sf)__a, (__v8sf)__b, \
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(mask) & 0x3, ((mask) & 0xc) >> 2, \
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(((mask) & 0x30) >> 4) + 8, (((mask) & 0xc0) >> 6) + 8, \
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((mask) & 0x3) + 4, (((mask) & 0xc) >> 2) + 4, \
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(((mask) & 0x30) >> 4) + 12, (((mask) & 0xc0) >> 6) + 12))
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(((mask) & 0x30) >> 4) + 12, (((mask) & 0xc0) >> 6) + 12); })
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#define _mm256_shuffle_pd(a, b, mask) \
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(__builtin_shufflevector((__v4df)(a), (__v4df)(b), \
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#define _mm256_shuffle_pd(a, b, mask) __extension__ ({ \
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__m256d __a = (a); \
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__m256d __b = (b); \
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(__m256d)__builtin_shufflevector((__v4df)__a, (__v4df)__b, \
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(mask) & 0x1, \
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(((mask) & 0x2) >> 1) + 4, \
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(((mask) & 0x4) >> 2) + 2, \
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(((mask) & 0x8) >> 3) + 6))
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(((mask) & 0x8) >> 3) + 6); })
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/* Compare */
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#define _CMP_EQ_OQ 0x00 /* Equal (ordered, non-signaling) */
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@ -385,23 +389,35 @@ _mm256_dp_ps(__m256 a, __m256 b, const int c)
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#define _CMP_GT_OQ 0x1e /* Greater-than (ordered, non-signaling) */
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#define _CMP_TRUE_US 0x1f /* True (unordered, signaling) */
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#define _mm_cmp_pd(a, b, c) \
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(__m128d)__builtin_ia32_cmppd((__v2df)(a), (__v2df)(b), (c))
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#define _mm_cmp_pd(a, b, c) __extension__ ({ \
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__m128d __a = (a); \
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__m128d __b = (b); \
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(__m128d)__builtin_ia32_cmppd((__v2df)__a, (__v2df)__b, (c)); })
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#define _mm_cmp_ps(a, b, c) \
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(__m128)__builtin_ia32_cmpps((__v4sf)(a), (__v4sf)(b), (c))
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#define _mm_cmp_ps(a, b, c) __extension__ ({ \
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__m128 __a = (a); \
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__m128 __b = (b); \
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(__m128)__builtin_ia32_cmpps((__v4sf)__a, (__v4sf)__b, (c)); })
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#define _mm256_cmp_pd(a, b, c) \
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(__m256d)__builtin_ia32_cmppd256((__v4df)(a), (__v4df)(b), (c))
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#define _mm256_cmp_pd(a, b, c) __extension__ ({ \
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__m256d __a = (a); \
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__m256d __b = (b); \
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(__m256d)__builtin_ia32_cmppd256((__v4df)__a, (__v4df)__b, (c)); })
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#define _mm256_cmp_ps(a, b, c) \
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(__m256)__builtin_ia32_cmpps256((__v8sf)(a), (__v8sf)(b), (c))
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#define _mm256_cmp_ps(a, b, c) __extension__ ({ \
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__m256 __a = (a); \
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__m256 __b = (b); \
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(__m256)__builtin_ia32_cmpps256((__v8sf)__a, (__v8sf)__b, (c)); })
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#define _mm_cmp_sd(a, b, c) \
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(__m128d)__builtin_ia32_cmpsd((__v2df)(a), (__v2df)(b), (c))
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#define _mm_cmp_sd(a, b, c) __extension__ ({ \
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__m128d __a = (a); \
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__m128d __b = (b); \
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(__m128d)__builtin_ia32_cmpsd((__v2df)__a, (__v2df)__b, (c)); })
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#define _mm_cmp_ss(a, b, c) \
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(__m128)__builtin_ia32_cmpss((__v4sf)(a), (__v4sf)(b), (c))
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#define _mm_cmp_ss(a, b, c) __extension__ ({ \
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__m128 __a = (a); \
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__m128 __b = (b); \
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(__m128)__builtin_ia32_cmpss((__v4sf)__a, (__v4sf)__b, (c)); })
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/* Vector extract */
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static __inline __m128d __attribute__((__always_inline__, __nodebug__))
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@ -821,8 +821,9 @@ _mm_xor_si128(__m128i a, __m128i b)
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return a ^ b;
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}
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#define _mm_slli_si128(VEC, IMM) \
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((__m128i)__builtin_ia32_pslldqi128((__m128i)(VEC), (IMM)*8))
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#define _mm_slli_si128(a, count) __extension__ ({ \
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__m128i __a = (a); \
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(__m128i)__builtin_ia32_pslldqi128(__a, (count)*8); })
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static __inline__ __m128i __attribute__((__always_inline__, __nodebug__))
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_mm_slli_epi16(__m128i a, int count)
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@ -885,8 +886,9 @@ _mm_sra_epi32(__m128i a, __m128i count)
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}
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#define _mm_srli_si128(VEC, IMM) \
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((__m128i)__builtin_ia32_psrldqi128((__m128i)(VEC), (IMM)*8))
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#define _mm_srli_si128(a, count) __extension__ ({ \
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__m128i __a = (a); \
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(__m128i)__builtin_ia32_psrldqi128(__a, (count)*8); })
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static __inline__ __m128i __attribute__((__always_inline__, __nodebug__))
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_mm_srli_epi16(__m128i a, int count)
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@ -1259,23 +1261,27 @@ _mm_movemask_epi8(__m128i a)
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return __builtin_ia32_pmovmskb128((__v16qi)a);
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}
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#define _mm_shuffle_epi32(a, imm) \
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((__m128i)__builtin_shufflevector((__v4si)(a), (__v4si) _mm_set1_epi32(0), \
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(imm) & 0x3, ((imm) & 0xc) >> 2, \
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((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6))
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#define _mm_shuffle_epi32(a, imm) __extension__ ({ \
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__m128i __a = (a); \
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(__m128i)__builtin_shufflevector((__v4si)__a, (__v4si) _mm_set1_epi32(0), \
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(imm) & 0x3, ((imm) & 0xc) >> 2, \
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((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6); })
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#define _mm_shufflelo_epi16(a, imm) __extension__ ({ \
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__m128i __a = (a); \
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(__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi) _mm_set1_epi16(0), \
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(imm) & 0x3, ((imm) & 0xc) >> 2, \
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((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6, \
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4, 5, 6, 7); })
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#define _mm_shufflelo_epi16(a, imm) \
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((__m128i)__builtin_shufflevector((__v8hi)(a), (__v8hi) _mm_set1_epi16(0), \
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(imm) & 0x3, ((imm) & 0xc) >> 2, \
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((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6, \
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4, 5, 6, 7))
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#define _mm_shufflehi_epi16(a, imm) \
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((__m128i)__builtin_shufflevector((__v8hi)(a), (__v8hi) _mm_set1_epi16(0), 0, 1, 2, 3, \
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4 + (((imm) & 0x03) >> 0), \
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4 + (((imm) & 0x0c) >> 2), \
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4 + (((imm) & 0x30) >> 4), \
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4 + (((imm) & 0xc0) >> 6)))
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#define _mm_shufflehi_epi16(a, imm) __extension__ ({ \
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__m128i __a = (a); \
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(__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi) _mm_set1_epi16(0), \
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0, 1, 2, 3, \
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4 + (((imm) & 0x03) >> 0), \
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4 + (((imm) & 0x0c) >> 2), \
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4 + (((imm) & 0x30) >> 4), \
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4 + (((imm) & 0xc0) >> 6)); })
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static __inline__ __m128i __attribute__((__always_inline__, __nodebug__))
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_mm_unpackhi_epi8(__m128i a, __m128i b)
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@ -1361,9 +1367,10 @@ _mm_movemask_pd(__m128d a)
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return __builtin_ia32_movmskpd(a);
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}
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#define _mm_shuffle_pd(a, b, i) \
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(__builtin_shufflevector((__m128d)(a), (__m128d)(b), (i) & 1, \
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(((i) & 2) >> 1) + 2))
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#define _mm_shuffle_pd(a, b, i) __extension__ ({ \
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__m128d __a = (a); \
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__m128d __b = (b); \
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__builtin_shufflevector(__a, __b, (i) & 1, (((i) & 2) >> 1) + 2); })
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static __inline__ __m128 __attribute__((__always_inline__, __nodebug__))
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_mm_castpd_ps(__m128d in)
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@ -66,8 +66,15 @@ _mm_abs_epi32(__m128i a)
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return (__m128i)__builtin_ia32_pabsd128((__v4si)a);
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}
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#define _mm_alignr_epi8(a, b, n) (__builtin_ia32_palignr128((a), (b), (n)))
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#define _mm_alignr_pi8(a, b, n) (__builtin_ia32_palignr((a), (b), (n)))
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#define _mm_alignr_epi8(a, b, n) __extension__ ({ \
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__m128i __a = (a); \
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__m128i __b = (b); \
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(__m128i)__builtin_ia32_palignr128((__v16qi)__a, (__v16qi)__b, (n)); })
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#define _mm_alignr_pi8(a, b, n) __extension__ ({ \
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__m64 __a = (a); \
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__m64 __b = (b); \
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(__m64)__builtin_ia32_palignr((__v8qi)__a, (__v8qi)__b, (n)); })
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static __inline__ __m128i __attribute__((__always_inline__, __nodebug__))
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_mm_hadd_epi16(__m128i a, __m128i b)
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@ -735,8 +735,9 @@ _mm_mulhi_pu16(__m64 a, __m64 b)
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return (__m64)__builtin_ia32_pmulhuw((__v4hi)a, (__v4hi)b);
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}
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#define _mm_shuffle_pi16(a, n) \
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((__m64)__builtin_ia32_pshufw(a, n))
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#define _mm_shuffle_pi16(a, n) __extension__ ({ \
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__m64 __a = (a); \
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(__m64)__builtin_ia32_pshufw((__v4hi)__a, (n)); })
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static __inline__ void __attribute__((__always_inline__, __nodebug__))
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_mm_maskmove_si64(__m64 d, __m64 n, char *p)
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@ -774,11 +775,13 @@ _mm_setcsr(unsigned int i)
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__builtin_ia32_ldmxcsr(i);
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}
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#define _mm_shuffle_ps(a, b, mask) \
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(__builtin_shufflevector((__v4sf)(a), (__v4sf)(b), \
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(mask) & 0x3, ((mask) & 0xc) >> 2, \
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(((mask) & 0x30) >> 4) + 4, \
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(((mask) & 0xc0) >> 6) + 4))
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#define _mm_shuffle_ps(a, b, mask) __extension__ ({ \
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__m128 __a = (a); \
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__m128 __b = (b); \
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(__m128)__builtin_shufflevector((__v4sf)__a, (__v4sf)__b, \
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(mask) & 0x3, ((mask) & 0xc) >> 2, \
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(((mask) & 0x30) >> 4) + 4, \
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(((mask) & 0xc0) >> 6) + 4); })
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static __inline__ __m128 __attribute__((__always_inline__, __nodebug__))
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_mm_unpackhi_ps(__m128 a, __m128 b)
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@ -4,7 +4,9 @@
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#include <tmmintrin.h>
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__m64 test1(__m64 a, __m64 b, int c) {
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return _mm_alignr_pi8(a, b, c); // expected-error {{argument to '__builtin_ia32_palignr' must be a constant integer}}
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// FIXME: The "incompatible result type" error is due to pr10112 and should
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// be removed when that is fixed.
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return _mm_alignr_pi8(a, b, c); // expected-error {{argument to '__builtin_ia32_palignr' must be a constant integer}} expected-error {{incompatible result type}}
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}
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int test2(int N) {
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