forked from OSchip/llvm-project
Remove some dead assignements found by scan-build
llvm-svn: 204526
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ec2629964e
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c97727a492
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@ -1674,7 +1674,7 @@ void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM,
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// Print debug location information.
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if (isDebugValue() && getOperand(e - 1).isMetadata()) {
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if (!HaveSemi) OS << ";"; HaveSemi = true;
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if (!HaveSemi) OS << ";";
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DIVariable DV(getOperand(e - 1).getMetadata());
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OS << " line no:" << DV.getLineNumber();
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if (MDNode *InlinedAt = DV.getInlinedAt()) {
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@ -875,10 +875,8 @@ bool AsmParser::parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) {
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MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None;
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if (Split.first.size() != IDVal.size()) {
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Variant = MCSymbolRefExpr::getVariantKindForName(Split.second);
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if (Variant == MCSymbolRefExpr::VK_Invalid) {
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Variant = MCSymbolRefExpr::VK_None;
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if (Variant == MCSymbolRefExpr::VK_Invalid)
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return TokError("invalid variant '" + Split.second + "'");
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}
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IDVal = Split.first;
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}
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if (IDVal == "f" || IDVal == "b") {
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@ -1617,9 +1615,9 @@ bool AsmParser::parseStatement(ParseStatementInfo &Info) {
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// If parsing succeeded, match the instruction.
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if (!HadError) {
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unsigned ErrorInfo;
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HadError = getTargetParser().MatchAndEmitInstruction(
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IDLoc, Info.Opcode, Info.ParsedOperands, Out, ErrorInfo,
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ParsingInlineAsm);
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getTargetParser().MatchAndEmitInstruction(IDLoc, Info.Opcode,
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Info.ParsedOperands, Out,
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ErrorInfo, ParsingInlineAsm);
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}
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// Don't skip the rest of the line, the instruction parser is responsible for
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@ -850,7 +850,6 @@ Value *DataFlowSanitizer::combineShadows(Value *V1, Value *V2,
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PHINode *Phi = PHINode::Create(ShadowTy, 2, "", Tail->begin());
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Phi->addIncoming(Call, Call->getParent());
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Phi->addIncoming(V1, Head);
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Pos = Phi;
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return Phi;
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}
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