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[X86] EltsFromConsecutiveLoads - store Loads on a per-element basis. NFCI. 

Cache the LoadSDNode nodes so we can easily map to/from the element index instead of packing them together - this will be useful for future patches for PR16739 etc.

llvm-svn: 365620
This commit is contained in:
Simon Pilgrim 2019-07-10 11:26:57 +00:00
parent fcd978b0a6
commit c972193583
1 changed files with 9 additions and 9 deletions
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18
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -7517,6 +7517,8 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
APInt ZeroMask = APInt::getNullValue(NumElems); APInt ZeroMask = APInt::getNullValue(NumElems);
APInt UndefMask = APInt::getNullValue(NumElems); APInt UndefMask = APInt::getNullValue(NumElems);
SmallVector<LoadSDNode*, 8> Loads(NumElems, nullptr);
// For each element in the initializer, see if we've found a load, zero or an // For each element in the initializer, see if we've found a load, zero or an
// undef. // undef.
for (unsigned i = 0; i < NumElems; ++i) { for (unsigned i = 0; i < NumElems; ++i) {
@ -7529,6 +7531,7 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
else if (X86::isZeroNode(Elt) || ISD::isBuildVectorAllZeros(Elt.getNode())) else if (X86::isZeroNode(Elt) || ISD::isBuildVectorAllZeros(Elt.getNode()))
ZeroMask.setBit(i); ZeroMask.setBit(i);
else if (ISD::isNON_EXTLoad(Elt.getNode())) { else if (ISD::isNON_EXTLoad(Elt.getNode())) {
Loads[i] = cast<LoadSDNode>(Elt);
LoadMask.setBit(i); LoadMask.setBit(i);
LastLoadedElt = i; LastLoadedElt = i;
// Each loaded element must be the correct fractional portion of the // Each loaded element must be the correct fractional portion of the
@ -7554,7 +7557,7 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
const TargetLowering &TLI = DAG.getTargetLoweringInfo(); const TargetLowering &TLI = DAG.getTargetLoweringInfo();
int FirstLoadedElt = LoadMask.countTrailingZeros(); int FirstLoadedElt = LoadMask.countTrailingZeros();
SDValue EltBase = peekThroughBitcasts(Elts[FirstLoadedElt]); SDValue EltBase = peekThroughBitcasts(Elts[FirstLoadedElt]);
LoadSDNode *LDBase = cast<LoadSDNode>(EltBase); LoadSDNode *LDBase = Loads[FirstLoadedElt];
EVT LDBaseVT = EltBase.getValueType(); EVT LDBaseVT = EltBase.getValueType();
// Consecutive loads can contain UNDEFS but not ZERO elements. // Consecutive loads can contain UNDEFS but not ZERO elements.
@ -7565,7 +7568,7 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
for (int i = FirstLoadedElt + 1; i <= LastLoadedElt; ++i) { for (int i = FirstLoadedElt + 1; i <= LastLoadedElt; ++i) {
if (LoadMask[i]) { if (LoadMask[i]) {
SDValue Elt = peekThroughBitcasts(Elts[i]); SDValue Elt = peekThroughBitcasts(Elts[i]);
LoadSDNode *LD = cast<LoadSDNode>(Elt); LoadSDNode* LD = Loads[i];
if (!DAG.areNonVolatileConsecutiveLoads( if (!DAG.areNonVolatileConsecutiveLoads(
LD, LDBase, Elt.getValueType().getStoreSizeInBits() / 8, LD, LDBase, Elt.getValueType().getStoreSizeInBits() / 8,
i - FirstLoadedElt)) { i - FirstLoadedElt)) {
@ -7578,11 +7581,6 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
} }
} }
SmallVector<LoadSDNode *, 8> Loads;
for (int i = FirstLoadedElt; i <= LastLoadedElt; ++i)
if (LoadMask[i])
Loads.push_back(cast<LoadSDNode>(peekThroughBitcasts(Elts[i])));
auto CreateLoad = [&DAG, &DL, &Loads](EVT VT, LoadSDNode *LDBase) { auto CreateLoad = [&DAG, &DL, &Loads](EVT VT, LoadSDNode *LDBase) {
auto MMOFlags = LDBase->getMemOperand()->getFlags(); auto MMOFlags = LDBase->getMemOperand()->getFlags();
assert(!(MMOFlags & MachineMemOperand::MOVolatile) && assert(!(MMOFlags & MachineMemOperand::MOVolatile) &&
@ -7591,7 +7589,8 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
DAG.getLoad(VT, DL, LDBase->getChain(), LDBase->getBasePtr(), DAG.getLoad(VT, DL, LDBase->getChain(), LDBase->getBasePtr(),
LDBase->getPointerInfo(), LDBase->getAlignment(), MMOFlags); LDBase->getPointerInfo(), LDBase->getAlignment(), MMOFlags);
for (auto *LD : Loads) for (auto *LD : Loads)
DAG.makeEquivalentMemoryOrdering(LD, NewLd); if (LD)
DAG.makeEquivalentMemoryOrdering(LD, NewLd);
return NewLd; return NewLd;
}; };
@ -7682,7 +7681,8 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
LDBase->getAlignment(), LDBase->getAlignment(),
MachineMemOperand::MOLoad); MachineMemOperand::MOLoad);
for (auto *LD : Loads) for (auto *LD : Loads)
DAG.makeEquivalentMemoryOrdering(LD, ResNode); if (LD)
DAG.makeEquivalentMemoryOrdering(LD, ResNode);
return DAG.getBitcast(VT, ResNode); return DAG.getBitcast(VT, ResNode);
} }
} }