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[X86] Add commuted isel pattern for the load form of ADCX instructions. 

This prevents the legacy ADC instruction from being favored over ADCX when the load is in the operand 0.

llvm-svn: 341745
This commit is contained in:
Craig Topper 2018-09-08 06:31:43 +00:00
parent 22a6f51646
commit c96305970d
2 changed files with 24 additions and 7 deletions
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9
llvm/lib/Target/X86/X86InstrArithmetic.td
View File

@ -1360,3 +1360,12 @@ let Predicates = [HasADX], Defs = [EFLAGS], Uses = [EFLAGS],
} // hasSideEffects = 0
} // mayLoad = 1, SchedRW = [WriteADCLd]
}
// Patterns to recognize loads on the LHS of an ADC. We can't make X86adc_flag
// commutable since it has EFLAGs as an input.
let Predicates = [HasADX], AddedComplexity = 10 in {
def : Pat<(X86adc_flag (loadi32 addr:$src2), GR32:$src1, EFLAGS),
(ADCX32rm GR32:$src1, addr:$src2)>;
def : Pat<(X86adc_flag (loadi64 addr:$src2), GR64:$src1, EFLAGS),
(ADCX64rm GR64:$src1, addr:$src2)>;
}

22
llvm/test/CodeGen/X86/adx-intrinsics.ll
View File

@ -29,13 +29,21 @@ define i8 @test_addcarryx_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) {
}
define i8 @test_addcarryx_u32_load(i8 %c, i32* %aptr, i32 %b, i8* %ptr) {
; CHECK-LABEL: test_addcarryx_u32_load:
; CHECK: ## %bb.0:
; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff]
; CHECK-NEXT: adcl (%rsi), %edx ## encoding: [0x13,0x16]
; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0]
; CHECK-NEXT: movl %edx, (%rcx) ## encoding: [0x89,0x11]
; CHECK-NEXT: retq ## encoding: [0xc3]
; NOADX-LABEL: test_addcarryx_u32_load:
; NOADX: ## %bb.0:
; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff]
; NOADX-NEXT: adcl (%rsi), %edx ## encoding: [0x13,0x16]
; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0]
; NOADX-NEXT: movl %edx, (%rcx) ## encoding: [0x89,0x11]
; NOADX-NEXT: retq ## encoding: [0xc3]
;
; ADX-LABEL: test_addcarryx_u32_load:
; ADX: ## %bb.0:
; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff]
; ADX-NEXT: adcxl (%rsi), %edx ## encoding: [0x66,0x0f,0x38,0xf6,0x16]
; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0]
; ADX-NEXT: movl %edx, (%rcx) ## encoding: [0x89,0x11]
; ADX-NEXT: retq ## encoding: [0xc3]
%a = load i32, i32* %aptr
%ret = call { i8, i32 } @llvm.x86.addcarryx.u32(i8 %c, i32 %a, i32 %b)
%1 = extractvalue { i8, i32 } %ret, 1