forked from OSchip/llvm-project
start setting up infrastructure for passing multi-floats
as <2 x float> instead of as double. The backend isn't ready yet, but infrastructure in the frontend can come up. llvm-svn: 109768
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a3e0ddb564
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c95a398947
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@ -718,7 +718,8 @@ class X86_64ABIInfo : public ABIInfo {
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void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const;
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const llvm::Type *Get16ByteVectorType(QualType Ty) const;
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const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType,
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unsigned IROffset) const;
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const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType,
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unsigned IROffset, QualType SourceTy,
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unsigned SourceOffset) const;
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@ -1211,6 +1212,20 @@ const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const {
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}
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/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
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/// low 8 bytes of an XMM register, corresponding to the SSE class.
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const llvm::Type *X86_64ABIInfo::GetSSETypeAtOffset(const llvm::Type *IRType,
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unsigned IROffset) const {
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// The only two choices we have are either double or <2 x float>.
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// FIXME: <2 x float> doesn't pass as one XMM register yet. Don't enable this
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// code until it does.
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return llvm::Type::getDoubleTy(getVMContext());
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}
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/// BitsContainNoUserData - Return true if the specified [start,end) bit range
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/// is known to either be off the end of the specified type or being in
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/// alignment padding. The user type specified is known to be at most 128 bits
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@ -1405,7 +1420,7 @@ classifyReturnType(QualType RetTy) const {
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// AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
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// available SSE register of the sequence %xmm0, %xmm1 is used.
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case SSE:
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ResType = llvm::Type::getDoubleTy(getVMContext());
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ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0);
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break;
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// AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
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@ -1443,11 +1458,12 @@ classifyReturnType(QualType RetTy) const {
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ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL);
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break;
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}
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case SSE:
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ResType = llvm::StructType::get(getVMContext(), ResType,
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llvm::Type::getDoubleTy(getVMContext()),
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NULL);
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case SSE: {
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const llvm::Type *HiType =
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GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8);
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ResType = llvm::StructType::get(getVMContext(), ResType, HiType,NULL);
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break;
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}
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// AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
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// is passed in the upper half of the last used SSE register.
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@ -1465,10 +1481,11 @@ classifyReturnType(QualType RetTy) const {
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// anything. However, in some cases with unions it may not be
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// preceeded by X87. In such situations we follow gcc and pass the
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// extra bits in an SSE reg.
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if (Lo != X87)
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ResType = llvm::StructType::get(getVMContext(), ResType,
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llvm::Type::getDoubleTy(getVMContext()),
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NULL);
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if (Lo != X87) {
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const llvm::Type *HiType =
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GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8);
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ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL);
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}
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break;
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}
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@ -1522,7 +1539,7 @@ ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt,
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// order from %xmm0 to %xmm7.
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case SSE:
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++neededSSE;
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ResType = llvm::Type::getDoubleTy(getVMContext());
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ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0);
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break;
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}
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@ -1550,12 +1567,13 @@ ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt,
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// X87Up generally doesn't occur here (long double is passed in
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// memory), except in situations involving unions.
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case X87Up:
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case SSE:
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ResType = llvm::StructType::get(getVMContext(), ResType,
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llvm::Type::getDoubleTy(getVMContext()),
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NULL);
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case SSE: {
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const llvm::Type *HiType =
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GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8);
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ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL);
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++neededSSE;
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break;
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}
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// AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
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// eightbyte is passed in the upper half of the last used SSE
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