forked from OSchip/llvm-project
parent
041ac6c2b1
commit
c947aaeeae
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@ -1076,6 +1076,99 @@ namespace {
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};
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}
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namespace {
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static const unsigned NVPTXAddrSpaceMap[] = {
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1, // opencl_global
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3, // opencl_local
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4, // opencl_constant
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1, // cuda_device
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4, // cuda_constant
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3, // cuda_shared
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};
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class NVPTXTargetInfo : public TargetInfo {
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static const char * const GCCRegNames[];
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public:
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NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
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BigEndian = false;
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TLSSupported = false;
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LongWidth = LongAlign = 64;
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AddrSpaceMap = &NVPTXAddrSpaceMap;
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}
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virtual void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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Builder.defineMacro("__PTX__");
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}
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virtual void getTargetBuiltins(const Builtin::Info *&Records,
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unsigned &NumRecords) const {
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// FIXME: implement.
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Records = 0;
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NumRecords = 0;
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}
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virtual bool hasFeature(StringRef Feature) const {
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return Feature == "nvptx";
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}
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virtual void getGCCRegNames(const char * const *&Names,
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unsigned &NumNames) const;
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virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
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unsigned &NumAliases) const {
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// No aliases.
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Aliases = 0;
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NumAliases = 0;
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}
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virtual bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &info) const {
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// FIXME: implement
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return true;
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}
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virtual const char *getClobbers() const {
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// FIXME: Is this really right?
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return "";
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}
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virtual const char *getVAListDeclaration() const {
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// FIXME: implement
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return "typedef char* __builtin_va_list;";
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}
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virtual bool setCPU(const std::string &Name) {
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return Name == "sm_10";
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}
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};
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const char * const NVPTXTargetInfo::GCCRegNames[] = {
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"r0"
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};
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void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
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unsigned &NumNames) const {
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Names = GCCRegNames;
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NumNames = llvm::array_lengthof(GCCRegNames);
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}
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class NVPTX32TargetInfo : public NVPTXTargetInfo {
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public:
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NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
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PointerWidth = PointerAlign = 32;
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SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
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DescriptionString
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= "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
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"f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
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"n16:32:64";
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}
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};
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class NVPTX64TargetInfo : public NVPTXTargetInfo {
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public:
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NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
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PointerWidth = PointerAlign = 64;
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SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
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DescriptionString
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= "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
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"f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
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"n16:32:64";
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}
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};
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}
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namespace {
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// MBlaze abstract base class
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class MBlazeTargetInfo : public TargetInfo {
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@ -4051,6 +4144,11 @@ static TargetInfo *AllocateTarget(const std::string &T) {
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case llvm::Triple::ptx64:
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return new PTX64TargetInfo(T);
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case llvm::Triple::nvptx:
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return new NVPTX32TargetInfo(T);
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case llvm::Triple::nvptx64:
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return new NVPTX64TargetInfo(T);
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case llvm::Triple::mblaze:
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return new MBlazeTargetInfo(T);
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@ -3706,6 +3706,8 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
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case llvm::Triple::ptx32:
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case llvm::Triple::ptx64:
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case llvm::Triple::nvptx:
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case llvm::Triple::nvptx64:
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return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types));
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case llvm::Triple::mblaze:
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