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[X86][AVX] Add target shuffle decode support for VBROADCAST 

Currently we only decode broadcasts from a vector of the same size.

llvm-svn: 275823
This commit is contained in:
Simon Pilgrim 2016-07-18 17:32:59 +00:00
parent 5948ea78b9
commit c941f6b329
4 changed files with 19 additions and 4 deletions
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6
llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp
View File

@ -275,6 +275,12 @@ void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
}
}
/// Decodes a broadcast of the first element of a vector.
void DecodeVectorBroadcast(MVT DstVT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumElts = DstVT.getVectorNumElements();
ShuffleMask.append(NumElts, 0);
}
/// Decodes a broadcast of a subvector to a larger vector type.
void DecodeSubVectorBroadcast(MVT DstVT, MVT SrcVT,
SmallVectorImpl<int> &ShuffleMask) {

3
llvm/lib/Target/X86/Utils/X86ShuffleDecode.h
View File

@ -88,6 +88,9 @@ void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
/// datatypes and vector widths.
void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
/// Decodes a broadcast of the first element of a vector.
void DecodeVectorBroadcast(MVT DstVT, SmallVectorImpl<int> &ShuffleMask);
/// Decodes a broadcast of a subvector to a larger vector type.
void DecodeSubVectorBroadcast(MVT DstVT, MVT SrcVT,
SmallVectorImpl<int> &ShuffleMask);

10
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -3804,6 +3804,7 @@ static bool isTargetShuffle(unsigned Opcode) {
case X86ISD::MOVSD:
case X86ISD::UNPCKL:
case X86ISD::UNPCKH:
case X86ISD::VBROADCAST:
case X86ISD::VPERMILPI:
case X86ISD::VPERMILPV:
case X86ISD::VPERM2X128:
@ -4920,6 +4921,15 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
DecodeZeroMoveLowMask(VT, Mask);
IsUnary = true;
break;
case X86ISD::VBROADCAST: {
// We only decode broadcasts of same-sized vectors at the moment.
if (N->getOperand(0).getValueType() == VT) {
DecodeVectorBroadcast(VT, Mask);
IsUnary = true;
break;
}
return false;
}
case X86ISD::VPERMILPV: {
IsUnary = true;
SDValue MaskNode = N->getOperand(1);

4
llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
View File

@ -207,7 +207,6 @@ define <16 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb128(<16 x i8> %a) {
; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb128:
; CHECK: # BB#0:
; CHECK-NEXT: vpbroadcastb %xmm0, %xmm0
; CHECK-NEXT: vpbroadcastb %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> zeroinitializer
%2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> zeroinitializer)
@ -218,8 +217,6 @@ define <32 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb256(<32 x i8> %a) {
; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb256:
; CHECK: # BB#0:
; CHECK-NEXT: vpbroadcastb %xmm0, %ymm0
; CHECK-NEXT: vpxor %ymm1, %ymm1, %ymm1
; CHECK-NEXT: vpshufb %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> zeroinitializer
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> zeroinitializer)
@ -230,7 +227,6 @@ define <4 x float> @combine_vpbroadcast_pshufb_as_vpbroadcastss128(<4 x float> %
; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastss128:
; CHECK: # BB#0:
; CHECK-NEXT: vbroadcastss %xmm0, %xmm0
; CHECK-NEXT: vbroadcastss %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> zeroinitializer
%2 = bitcast <4 x float> %1 to <16 x i8>