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[X86/MC] Factor out common code [NFC]

This commit is contained in:
Philip Reames 2020-03-05 09:43:20 -08:00
parent e440e0a715
commit c93f1046fc
3 changed files with 27 additions and 40 deletions
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18
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
View File

@ -390,22 +390,8 @@ uint8_t X86AsmBackend::determinePaddingPrefix(const MCInst &Inst) const {
} }
} }
switch (SegmentReg) { if (SegmentReg != 0)
case 0: return X86::getSegmentOverridePrefixForReg(SegmentReg);
break;
case X86::CS:
return X86::CS_Encoding;
case X86::DS:
return X86::DS_Encoding;
case X86::ES:
return X86::ES_Encoding;
case X86::FS:
return X86::FS_Encoding;
case X86::GS:
return X86::GS_Encoding;
case X86::SS:
return X86::SS_Encoding;
}
if (STI.hasFeature(X86::Mode64Bit)) if (STI.hasFeature(X86::Mode64Bit))
return X86::CS_Encoding; return X86::CS_Encoding;

23
llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
View File

@ -393,6 +393,29 @@ namespace X86 {
GS_Encoding = 0x65, GS_Encoding = 0x65,
SS_Encoding = 0x36 SS_Encoding = 0x36
}; };
/// Given a segment register, return the encoding of the segment override
/// prefix for it.
inline EncodingOfSegmentOverridePrefix
getSegmentOverridePrefixForReg(unsigned Reg) {
switch (Reg) {
default:
llvm_unreachable("Unknown segment register!");
case X86::CS:
return CS_Encoding;
case X86::DS:
return DS_Encoding;
case X86::ES:
return ES_Encoding;
case X86::FS:
return FS_Encoding;
case X86::GS:
return GS_Encoding;
case X86::SS:
return SS_Encoding;
}
}
} // end namespace X86; } // end namespace X86;
/// X86II - This namespace holds all of the target specific flags that /// X86II - This namespace holds all of the target specific flags that

26
llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
View File

@ -1262,30 +1262,8 @@ void X86MCCodeEmitter::emitSegmentOverridePrefix(unsigned &CurByte,
const MCInst &MI, const MCInst &MI,
raw_ostream &OS) const { raw_ostream &OS) const {
// Check for explicit segment override on memory operand. // Check for explicit segment override on memory operand.
switch (MI.getOperand(SegOperand).getReg()) { if (unsigned Reg = MI.getOperand(SegOperand).getReg())
default: emitByte(X86::getSegmentOverridePrefixForReg(Reg), CurByte, OS);
llvm_unreachable("Unknown segment register!");
case 0:
break;
case X86::CS:
emitByte(0x2E, CurByte, OS);
break;
case X86::SS:
emitByte(0x36, CurByte, OS);
break;
case X86::DS:
emitByte(0x3E, CurByte, OS);
break;
case X86::ES:
emitByte(0x26, CurByte, OS);
break;
case X86::FS:
emitByte(0x64, CurByte, OS);
break;
case X86::GS:
emitByte(0x65, CurByte, OS);
break;
}
} }
/// Emit all instruction prefixes prior to the opcode. /// Emit all instruction prefixes prior to the opcode.