Fix a number of Clang-Tidy warnings.

PiperOrigin-RevId: 270632324
This commit is contained in:
Christian Sigg 2019-09-23 02:33:51 -07:00 committed by A. Unique TensorFlower
parent f1442f1eff
commit c900d4994e
23 changed files with 36 additions and 38 deletions

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@ -56,7 +56,7 @@ std::pair<mlir::Value *, unsigned> linalg::getViewRootIndexing(Value *view,
unsigned sliceDim = sliceOp.getSlicingDim();
auto *indexing = sliceOp.getIndexing();
if (indexing->getDefiningOp()) {
if (auto rangeOp = cast<RangeOp>(indexing->getDefiningOp())) {
if (auto rangeOp = dyn_cast<RangeOp>(indexing->getDefiningOp())) {
// If I sliced with a range and I sliced at this dim, then I'm it.
if (dim == sliceDim) {
return std::make_pair(rangeOp.getResult(), dim);

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@ -258,7 +258,7 @@ struct Rewriter : public OpRewritePattern<LoadOrStoreOpTy> {
struct LowerLinalgLoadStorePass
: public FunctionPass<LowerLinalgLoadStorePass> {
void runOnFunction() {
void runOnFunction() override {
OwningRewritePatternList patterns;
auto *context = &getContext();
patterns.insert<Rewriter<linalg::LoadOp>, Rewriter<linalg::StoreOp>>(

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@ -2632,7 +2632,7 @@ void FlatAffineConstraints::FourierMotzkinEliminate(
LLVM_DEBUG(llvm::dbgs() << "FM isResultIntegerExact: " << (lcmProducts == 1)
<< "\n");
if (lcmProducts == 1 && isResultIntegerExact)
*isResultIntegerExact = 1;
*isResultIntegerExact = true;
// Copy over the constraints not involving this variable.
for (auto nbPos : nbIndices) {

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@ -249,7 +249,7 @@ class ReturnToSPIRVConversion : public ConversionPattern {
public:
ReturnToSPIRVConversion(MLIRContext *context)
: ConversionPattern(ReturnOp::getOperationName(), 1, context) {}
virtual PatternMatchResult
PatternMatchResult
matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
ConversionPatternRewriter &rewriter) const override {
if (op->getNumOperands()) {

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@ -164,7 +164,7 @@ void mlir::populateVectorToLLVMConversionPatterns(
namespace {
struct LowerVectorToLLVMPass : public ModulePass<LowerVectorToLLVMPass> {
void runOnModule();
void runOnModule() override;
};
} // namespace

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@ -121,7 +121,7 @@ struct UniformDequantizePattern : public OpRewritePattern<DequantizeCastOp> {
using OpRewritePattern<DequantizeCastOp>::OpRewritePattern;
PatternMatchResult matchAndRewrite(DequantizeCastOp op,
PatternRewriter &rewriter) const {
PatternRewriter &rewriter) const override {
Type inputType = op.arg()->getType();
Type outputType = op.getResult()->getType();
@ -322,7 +322,7 @@ struct UniformRealAddEwPattern : public OpRewritePattern<RealAddEwOp> {
using OpRewritePattern<RealAddEwOp>::OpRewritePattern;
PatternMatchResult matchAndRewrite(RealAddEwOp op,
PatternRewriter &rewriter) const {
PatternRewriter &rewriter) const override {
const UniformBinaryOpInfo info(op, op.lhs(), op.rhs(), op.clamp_min(),
op.clamp_max());
if (!info.isValid()) {
@ -342,7 +342,7 @@ struct UniformRealMulEwPattern : public OpRewritePattern<RealMulEwOp> {
using OpRewritePattern<RealMulEwOp>::OpRewritePattern;
PatternMatchResult matchAndRewrite(RealMulEwOp op,
PatternRewriter &rewriter) const {
PatternRewriter &rewriter) const override {
const UniformBinaryOpInfo info(op, op.lhs(), op.rhs(), op.clamp_min(),
op.clamp_max());
if (!info.isValid()) {

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@ -337,7 +337,7 @@ struct LinalgFusionPass : public FunctionPass<LinalgFusionPass> {
LinalgFusionPass() = default;
LinalgFusionPass(ArrayRef<int64_t> sizes);
void runOnFunction() { fuseLinalgOps(getFunction(), tileSizes); }
void runOnFunction() override { fuseLinalgOps(getFunction(), tileSizes); }
SmallVector<int64_t, 8> tileSizes;
};

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@ -854,7 +854,7 @@ populateLinalgToLLVMConversionPatterns(LinalgTypeConverter &converter,
namespace {
struct LowerLinalgToLLVMPass : public ModulePass<LowerLinalgToLLVMPass> {
void runOnModule();
void runOnModule() override;
};
} // namespace

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@ -373,7 +373,7 @@ populateLinalgToLoopRewritePatterns(OwningRewritePatternList &patterns,
namespace {
struct LowerLinalgToLoopsPass : public FunctionPass<LowerLinalgToLoopsPass> {
void runOnFunction();
void runOnFunction() override;
};
} // namespace

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@ -513,7 +513,7 @@ struct LinalgTilingPass : public FunctionPass<LinalgTilingPass> {
LinalgTilingPass() = default;
LinalgTilingPass(ArrayRef<int64_t> sizes, bool promoteViews);
void runOnFunction() {
void runOnFunction() override {
tileLinalgOps(getFunction(), tileSizes, promoteViews);
}

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@ -165,7 +165,7 @@ private:
}
/// Process member decoration
LogicalResult processMemberDecoration(uint32_t structID, uint32_t memberNum,
LogicalResult processMemberDecoration(uint32_t structID, uint32_t memberIndex,
spirv::Decoration decorationType,
ArrayRef<uint32_t> values = {});

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@ -1434,7 +1434,7 @@ StringRef OperationPrinter::uniqueValueName(StringRef name) {
// generates new names by incrementing nextConflictID.
SmallString<64> probeName(name);
probeName.push_back('_');
while (1) {
while (true) {
probeName.resize(name.size() + 1);
probeName += llvm::utostr(nextConflictID++);
if (!usedNames.count(probeName)) {

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@ -769,7 +769,7 @@ struct ParallelDiagnosticHandlerImpl : public llvm::PrettyStackTraceEntry {
});
}
~ParallelDiagnosticHandlerImpl() {
~ParallelDiagnosticHandlerImpl() override {
// Restore the previous diagnostic handler.
context->getDiagEngine().setHandler(prevHandler);

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@ -369,7 +369,7 @@ Token Lexer::lexPrefixedIdentifier(const char *tokStart) {
Token Lexer::lexString(const char *tokStart) {
assert(curPtr[-1] == '"');
while (1) {
while (true) {
switch (*curPtr++) {
case '"':
return formToken(Token::string, tokStart);

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@ -4102,7 +4102,7 @@ ParseResult ModuleParser::parseModule(ModuleOp module) {
// Module itself is a name scope.
opParser.pushSSANameScope(/*isIsolated=*/true);
while (1) {
while (true) {
switch (getToken().getKind()) {
default:
// Parse a top-level operation.

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@ -25,6 +25,7 @@
#include "mlir/IR/Diagnostics.h"
#include "mlir/IR/Dialect.h"
#include "mlir/IR/Module.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Mutex.h"
#include "llvm/Support/Parallel.h"
@ -468,7 +469,7 @@ void PassManager::disableMultithreading(bool disable) {
/// Add the provided instrumentation to the pass manager.
void PassManager::addInstrumentation(std::unique_ptr<PassInstrumentation> pi) {
if (!instrumentor)
instrumentor.reset(new PassInstrumentor());
instrumentor = std::make_unique<PassInstrumentor>();
instrumentor->addInstrumentation(std::move(pi));
}

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@ -18,6 +18,7 @@
#include "PassDetail.h"
#include "mlir/Pass/PassManager.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Format.h"
@ -86,7 +87,7 @@ struct Timer {
std::function<std::string()> &&nameBuilder) {
auto &child = children[id];
if (!child)
child.reset(new Timer(nameBuilder(), kind));
child = std::make_unique<Timer>(nameBuilder(), kind);
return child.get();
}
@ -169,7 +170,7 @@ struct Timer {
struct PassTiming : public PassInstrumentation {
PassTiming(PassTimingDisplayMode displayMode) : displayMode(displayMode) {}
~PassTiming() { print(); }
~PassTiming() override { print(); }
/// Setup the instrumentation hooks.
void runBeforePipeline(const OperationName &name,
@ -222,7 +223,7 @@ struct PassTiming : public PassInstrumentation {
if (activeTimers.empty()) {
auto &rootTimer = rootTimers[tid];
if (!rootTimer)
rootTimer.reset(new Timer("root", TimerKind::Pipeline));
rootTimer = std::make_unique<Timer>("root", TimerKind::Pipeline);
parentTimer = rootTimer.get();
} else {
// Otherwise, add this to the active timer.

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@ -43,7 +43,6 @@
#define DEBUG_TYPE "affine-data-copy-generate"
using namespace mlir;
using llvm::SmallMapVector;
static llvm::cl::OptionCategory clOptionsCategory(DEBUG_TYPE " options");

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@ -381,8 +381,8 @@ class AffineApplyLowering : public OpRewritePattern<AffineApplyOp> {
public:
using OpRewritePattern<AffineApplyOp>::OpRewritePattern;
virtual PatternMatchResult
matchAndRewrite(AffineApplyOp op, PatternRewriter &rewriter) const override {
PatternMatchResult matchAndRewrite(AffineApplyOp op,
PatternRewriter &rewriter) const override {
auto maybeExpandedMap =
expandAffineMap(rewriter, op.getLoc(), op.getAffineMap(),
llvm::to_vector<8>(op.getOperands()));
@ -400,8 +400,8 @@ class AffineLoadLowering : public OpRewritePattern<AffineLoadOp> {
public:
using OpRewritePattern<AffineLoadOp>::OpRewritePattern;
virtual PatternMatchResult
matchAndRewrite(AffineLoadOp op, PatternRewriter &rewriter) const override {
PatternMatchResult matchAndRewrite(AffineLoadOp op,
PatternRewriter &rewriter) const override {
// Expand affine map from 'affineLoadOp'.
SmallVector<Value *, 8> indices(op.getMapOperands());
auto maybeExpandedMap =
@ -422,8 +422,8 @@ class AffineStoreLowering : public OpRewritePattern<AffineStoreOp> {
public:
using OpRewritePattern<AffineStoreOp>::OpRewritePattern;
virtual PatternMatchResult
matchAndRewrite(AffineStoreOp op, PatternRewriter &rewriter) const override {
PatternMatchResult matchAndRewrite(AffineStoreOp op,
PatternRewriter &rewriter) const override {
// Expand affine map from 'affineStoreOp'.
SmallVector<Value *, 8> indices(op.getMapOperands());
auto maybeExpandedMap =
@ -445,9 +445,8 @@ class AffineDmaStartLowering : public OpRewritePattern<AffineDmaStartOp> {
public:
using OpRewritePattern<AffineDmaStartOp>::OpRewritePattern;
virtual PatternMatchResult
matchAndRewrite(AffineDmaStartOp op,
PatternRewriter &rewriter) const override {
PatternMatchResult matchAndRewrite(AffineDmaStartOp op,
PatternRewriter &rewriter) const override {
SmallVector<Value *, 8> operands(op.getOperands());
auto operandsRef = llvm::makeArrayRef(operands);
@ -486,9 +485,8 @@ class AffineDmaWaitLowering : public OpRewritePattern<AffineDmaWaitOp> {
public:
using OpRewritePattern<AffineDmaWaitOp>::OpRewritePattern;
virtual PatternMatchResult
matchAndRewrite(AffineDmaWaitOp op,
PatternRewriter &rewriter) const override {
PatternMatchResult matchAndRewrite(AffineDmaWaitOp op,
PatternRewriter &rewriter) const override {
// Expand affine map for DMA tag memref.
SmallVector<Value *, 8> indices(op.getTagIndices());
auto maybeExpandedTagMap =

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@ -361,7 +361,7 @@ VectorTransferRewriter<VectorTransferWriteOp>::matchAndRewrite(
struct LowerVectorTransfersPass
: public FunctionPass<LowerVectorTransfersPass> {
void runOnFunction() {
void runOnFunction() override {
OwningRewritePatternList patterns;
auto *context = &getContext();
patterns.insert<VectorTransferRewriter<vector::VectorTransferReadOp>,

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@ -42,7 +42,6 @@
#define DEBUG_TYPE "LoopUtils"
using namespace mlir;
using llvm::MapVector;
using llvm::SetVector;
using llvm::SmallMapVector;

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@ -74,7 +74,7 @@ struct PrintCFGPass : public FunctionPass<PrintCFGPass> {
PrintCFGPass(llvm::raw_ostream &os = llvm::errs(), bool shortNames = false,
const llvm::Twine &title = "")
: os(os), shortNames(shortNames), title(title.str()) {}
void runOnFunction() {
void runOnFunction() override {
mlir::writeGraph(os, getFunction().getBody(), shortNames, title);
}

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@ -54,7 +54,7 @@ struct TestInlinerInterface : public DialectInlinerInterface {
return true;
}
bool shouldAnalyzeRecursively(Operation *op) const {
bool shouldAnalyzeRecursively(Operation *op) const override {
// Analyze recursively if this is not a functional region operation, it
// froms a separate functional scope.
return !isa<FunctionalRegionOp>(op);