From c8f8cda0cd5e621678c1d4c52be596524dcdf1cd Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 30 Aug 2017 22:18:40 +0000 Subject: [PATCH] AMDGPU: Correct operand types for v_mad_mix* These aren't really packed instructions, so the default op_sel_hi should be 0 since this indicates a conversion. The operand types are scalar values that behave similar to an f16 scalar that may be converted to f32. Doesn't change the default printing for op_sel_hi, just the parsing. llvm-svn: 312179 --- .../AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 22 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 1 + llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 20 +- llvm/lib/Target/AMDGPU/VOPInstructions.td | 7 +- llvm/test/MC/AMDGPU/gfx9_asm_all.s | 459 ------------------ llvm/test/MC/AMDGPU/vop3p.s | 58 ++- 6 files changed, 72 insertions(+), 495 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index e1de580437eb..417f425bfeb0 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -1074,7 +1074,10 @@ public: OptionalImmIndexMap &OptionalIdx); void cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands); void cvtVOP3(MCInst &Inst, const OperandVector &Operands); + void cvtVOP3PImpl(MCInst &Inst, const OperandVector &Operands, + bool IsPacked); void cvtVOP3P(MCInst &Inst, const OperandVector &Operands); + void cvtVOP3P_NotPacked(MCInst &Inst, const OperandVector &Operands); void cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands); @@ -4254,7 +4257,9 @@ void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) { cvtVOP3(Inst, Operands, OptionalIdx); } -void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) { +void AMDGPUAsmParser::cvtVOP3PImpl(MCInst &Inst, + const OperandVector &Operands, + bool IsPacked) { OptionalImmIndexMap OptIdx; cvtVOP3(Inst, Operands, OptIdx); @@ -4267,11 +4272,15 @@ void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) { int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi); if (OpSelHiIdx != -1) { - addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyOpSelHi, -1); + // TODO: Should we change the printing to match? + int DefaultVal = IsPacked ? -1 : 0; + addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyOpSelHi, + DefaultVal); } int NegLoIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::neg_lo); if (NegLoIdx != -1) { + assert(IsPacked); addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyNegLo); addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyNegHi); } @@ -4325,6 +4334,15 @@ void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) { } } +void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) { + cvtVOP3PImpl(Inst, Operands, true); +} + +void AMDGPUAsmParser::cvtVOP3P_NotPacked(MCInst &Inst, + const OperandVector &Operands) { + cvtVOP3PImpl(Inst, Operands, false); +} + //===----------------------------------------------------------------------===// // dpp //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 21d9ea36ccf5..ac68d2ad10aa 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -1636,6 +1636,7 @@ def VOP_I32_F32_F32 : VOPProfile <[i32, f32, f32, untyped]>; def VOP_I32_F32_I32 : VOPProfile <[i32, f32, i32, untyped]>; def VOP_I32_I32_I32 : VOPProfile <[i32, i32, i32, untyped]>; def VOP_V2F16_F32_F32 : VOPProfile <[v2f16, f32, f32, untyped]>; +def VOP_F32_F16_F16_F16 : VOPProfile <[f32, f16, f16, f16]>; def VOP_I64_I64_I32 : VOPProfile <[i64, i64, i32, untyped]>; def VOP_I64_I32_I64 : VOPProfile <[i64, i32, i64, untyped]>; diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td index 3becf758aaa3..e16d4ac47066 100644 --- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td @@ -20,11 +20,15 @@ class VOP3PInst // VOP3 neg/abs and VOP3P opsel/opsel_hi modifiers are allowed. class VOP3_VOP3PInst : VOP3P_Pseudo { + // These operands are only sort of f16 operands. Depending on + // op_sel_hi, these may be interpreted as f32. The inline immediate + // values are really f16 converted to f32, so we treat these as f16 + // operands. let InOperandList = (ins - FP32InputMods:$src0_modifiers, VCSrc_f32:$src0, - FP32InputMods:$src1_modifiers, VCSrc_f32:$src1, - FP32InputMods:$src2_modifiers, VCSrc_f32:$src2, + FP16InputMods:$src0_modifiers, VCSrc_f16:$src0, + FP16InputMods:$src1_modifiers, VCSrc_f16:$src1, + FP16InputMods:$src2_modifiers, VCSrc_f16:$src2, clampmod:$clamp, op_sel:$op_sel, op_sel_hi:$op_sel_hi); @@ -59,14 +63,14 @@ def V_PK_LSHLREV_B16 : VOP3PInst<"v_pk_lshlrev_b16", VOP3_Profile, ashr_rev>; def V_PK_LSHRREV_B16 : VOP3PInst<"v_pk_lshrrev_b16", VOP3_Profile, lshr_rev>; -// XXX - Commutable? // These are VOP3a-like opcodes which accept no omod. // Size of src arguments (16/32) is controlled by op_sel. // For 16-bit src arguments their location (hi/lo) are controlled by op_sel_hi. -def V_MAD_MIX_F32 : VOP3_VOP3PInst<"v_mad_mix_f32", VOP3_Profile>; -def V_MAD_MIXLO_F16 : VOP3_VOP3PInst<"v_mad_mixlo_f16", VOP3_Profile>; -def V_MAD_MIXHI_F16 : VOP3_VOP3PInst<"v_mad_mixhi_f16", VOP3_Profile>; - +let isCommutable = 1 in { +def V_MAD_MIX_F32 : VOP3_VOP3PInst<"v_mad_mix_f32", VOP3_Profile>; +def V_MAD_MIXLO_F16 : VOP3_VOP3PInst<"v_mad_mixlo_f16", VOP3_Profile>; +def V_MAD_MIXHI_F16 : VOP3_VOP3PInst<"v_mad_mixhi_f16", VOP3_Profile>; +} multiclass VOP3P_Real_vi op> { def _vi : VOP3P_Real(NAME), SIEncodingFamily.VI>, diff --git a/llvm/lib/Target/AMDGPU/VOPInstructions.td b/llvm/lib/Target/AMDGPU/VOPInstructions.td index 9f2800cae99f..823fb4c02c35 100644 --- a/llvm/lib/Target/AMDGPU/VOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOPInstructions.td @@ -112,9 +112,10 @@ class VOP3_Pseudo pattern = [], let AsmMatchConverter = !if(!and(P.IsPacked, isVOP3P), "cvtVOP3P", - !if(!or(P.HasModifiers, !or(P.HasOMod, P.HasIntClamp)), - "cvtVOP3", - "")); + !if(isVOP3P, "cvtVOP3P_NotPacked", + !if(!or(P.HasModifiers, !or(P.HasOMod, P.HasIntClamp)), + "cvtVOP3", + ""))); VOPProfile Pfl = P; } diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_all.s b/llvm/test/MC/AMDGPU/gfx9_asm_all.s index 3e7e526dba4b..0f7a5b3fdcff 100644 --- a/llvm/test/MC/AMDGPU/gfx9_asm_all.s +++ b/llvm/test/MC/AMDGPU/gfx9_asm_all.s @@ -106242,465 +106242,6 @@ v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[0,0,1] v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[1,1,1] // CHECK: [0x05,0x58,0x9a,0xd2,0x01,0x05,0x02,0x00] -v_mad_mix_f32 v5, v1, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v255, v1, v2, v3 -// CHECK: [0xff,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v255, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0xff,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, s1, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, s101, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x65,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, flat_scratch_lo, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x66,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, flat_scratch_hi, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x67,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, vcc_lo, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x6a,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, vcc_hi, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x6b,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, m0, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x7c,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, exec_lo, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x7e,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, exec_hi, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x7f,0x04,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v255, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xff,0x0f,0x1c] - -v_mad_mix_f32 v5, v1, s2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, s101, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xcb,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, flat_scratch_lo, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xcd,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, flat_scratch_hi, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xcf,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, vcc_lo, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xd5,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, vcc_hi, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xd7,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, m0, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xf9,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, exec_lo, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xfd,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, exec_hi, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0xff,0x0c,0x1c] - -v_mad_mix_f32 v5, v1, v2, v255 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0xfe,0x1f] - -v_mad_mix_f32 v5, v1, v2, s3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x18] - -v_mad_mix_f32 v5, v1, v2, s101 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x96,0x19] - -v_mad_mix_f32 v5, v1, v2, flat_scratch_lo -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x9a,0x19] - -v_mad_mix_f32 v5, v1, v2, flat_scratch_hi -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x9e,0x19] - -v_mad_mix_f32 v5, v1, v2, vcc_lo -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0xaa,0x19] - -v_mad_mix_f32 v5, v1, v2, vcc_hi -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0xae,0x19] - -v_mad_mix_f32 v5, v1, v2, m0 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0xf2,0x19] - -v_mad_mix_f32 v5, v1, v2, exec_lo -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0xfa,0x19] - -v_mad_mix_f32 v5, v1, v2, exec_hi -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0xfe,0x19] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel:[0,0,0] -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel:[1,0,0] -// CHECK: [0x05,0x48,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel:[0,1,0] -// CHECK: [0x05,0x50,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel:[0,0,1] -// CHECK: [0x05,0x60,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel:[1,1,1] -// CHECK: [0x05,0x78,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[1,1,1] -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[0,0,0] -// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[1,0,0] -// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x0c] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[0,1,0] -// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x14] - -v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[0,0,1] -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x04] - -v_mad_mix_f32 v5, -v1, v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x3c] - -v_mad_mix_f32 v5, v1, -v2, v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x5c] - -v_mad_mix_f32 v5, v1, v2, -v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x9c] - -v_mad_mix_f32 v5, -v1, -v2, -v3 -// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0xfc] - -v_mad_mix_f32 v5, |v1|, v2, v3 -// CHECK: [0x05,0x41,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, |v2|, v3 -// CHECK: [0x05,0x42,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, |v3| -// CHECK: [0x05,0x44,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, |v1|, |v2|, |v3| -// CHECK: [0x05,0x47,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mix_f32 v5, v1, v2, v3 clamp -// CHECK: [0x05,0xc0,0xa0,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v255, v1, v2, v3 -// CHECK: [0xff,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v255, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0xff,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, s1, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, s101, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x65,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, flat_scratch_lo, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x66,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, flat_scratch_hi, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x67,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, vcc_lo, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x6a,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, vcc_hi, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x6b,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, m0, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x7c,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, exec_lo, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x7e,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, exec_hi, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x7f,0x04,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v255, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xff,0x0f,0x1c] - -v_mad_mixhi_f16 v5, v1, s2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, s101, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xcb,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, flat_scratch_lo, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xcd,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, flat_scratch_hi, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xcf,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, vcc_lo, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xd5,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, vcc_hi, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xd7,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, m0, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xf9,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, exec_lo, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xfd,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, exec_hi, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0xff,0x0c,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v255 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0xfe,0x1f] - -v_mad_mixhi_f16 v5, v1, v2, s3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x18] - -v_mad_mixhi_f16 v5, v1, v2, s101 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x96,0x19] - -v_mad_mixhi_f16 v5, v1, v2, flat_scratch_lo -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x9a,0x19] - -v_mad_mixhi_f16 v5, v1, v2, flat_scratch_hi -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x9e,0x19] - -v_mad_mixhi_f16 v5, v1, v2, vcc_lo -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0xaa,0x19] - -v_mad_mixhi_f16 v5, v1, v2, vcc_hi -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0xae,0x19] - -v_mad_mixhi_f16 v5, v1, v2, m0 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0xf2,0x19] - -v_mad_mixhi_f16 v5, v1, v2, exec_lo -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0xfa,0x19] - -v_mad_mixhi_f16 v5, v1, v2, exec_hi -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0xfe,0x19] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[0,0,0] -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[1,0,0] -// CHECK: [0x05,0x48,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[0,1,0] -// CHECK: [0x05,0x50,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[0,0,1] -// CHECK: [0x05,0x60,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[1,1,1] -// CHECK: [0x05,0x78,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[1,1,1] -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[0,0,0] -// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x04] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[1,0,0] -// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x0c] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[0,1,0] -// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x14] - -v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[0,0,1] -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x04] - -v_mad_mixhi_f16 v5, -v1, v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x3c] - -v_mad_mixhi_f16 v5, v1, -v2, v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x5c] - -v_mad_mixhi_f16 v5, v1, v2, -v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x9c] - -v_mad_mixhi_f16 v5, -v1, -v2, -v3 -// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0xfc] - -v_mad_mixhi_f16 v5, |v1|, v2, v3 -// CHECK: [0x05,0x41,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, |v2|, v3 -// CHECK: [0x05,0x42,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, |v3| -// CHECK: [0x05,0x44,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, |v1|, |v2|, |v3| -// CHECK: [0x05,0x47,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixhi_f16 v5, v1, v2, v3 clamp -// CHECK: [0x05,0xc0,0xa2,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v255, v1, v2, v3 -// CHECK: [0xff,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v255, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0xff,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, s1, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, s101, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x65,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, flat_scratch_lo, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x66,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, flat_scratch_hi, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x67,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, vcc_lo, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x6a,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, vcc_hi, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x6b,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, m0, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x7c,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, exec_lo, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x7e,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, exec_hi, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x7f,0x04,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v255, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xff,0x0f,0x1c] - -v_mad_mixlo_f16 v5, v1, s2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, s101, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xcb,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, flat_scratch_lo, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xcd,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, flat_scratch_hi, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xcf,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, vcc_lo, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xd5,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, vcc_hi, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xd7,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, m0, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xf9,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, exec_lo, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xfd,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, exec_hi, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0xff,0x0c,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v255 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0xfe,0x1f] - -v_mad_mixlo_f16 v5, v1, v2, s3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x18] - -v_mad_mixlo_f16 v5, v1, v2, s101 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x96,0x19] - -v_mad_mixlo_f16 v5, v1, v2, flat_scratch_lo -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x9a,0x19] - -v_mad_mixlo_f16 v5, v1, v2, flat_scratch_hi -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x9e,0x19] - -v_mad_mixlo_f16 v5, v1, v2, vcc_lo -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0xaa,0x19] - -v_mad_mixlo_f16 v5, v1, v2, vcc_hi -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0xae,0x19] - -v_mad_mixlo_f16 v5, v1, v2, m0 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0xf2,0x19] - -v_mad_mixlo_f16 v5, v1, v2, exec_lo -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0xfa,0x19] - -v_mad_mixlo_f16 v5, v1, v2, exec_hi -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0xfe,0x19] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[0,0,0] -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[1,0,0] -// CHECK: [0x05,0x48,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[0,1,0] -// CHECK: [0x05,0x50,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[0,0,1] -// CHECK: [0x05,0x60,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[1,1,1] -// CHECK: [0x05,0x78,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[1,1,1] -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[0,0,0] -// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x04] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[1,0,0] -// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x0c] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[0,1,0] -// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x14] - -v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[0,0,1] -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x04] - -v_mad_mixlo_f16 v5, -v1, v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x3c] - -v_mad_mixlo_f16 v5, v1, -v2, v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x5c] - -v_mad_mixlo_f16 v5, v1, v2, -v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x9c] - -v_mad_mixlo_f16 v5, -v1, -v2, -v3 -// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0xfc] - -v_mad_mixlo_f16 v5, |v1|, v2, v3 -// CHECK: [0x05,0x41,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, |v2|, v3 -// CHECK: [0x05,0x42,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, |v3| -// CHECK: [0x05,0x44,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, |v1|, |v2|, |v3| -// CHECK: [0x05,0x47,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - -v_mad_mixlo_f16 v5, v1, v2, v3 clamp -// CHECK: [0x05,0xc0,0xa1,0xd3,0x01,0x05,0x0e,0x1c] - v_pk_mad_i16 v5, v1, v2, v3 // CHECK: [0x05,0x40,0x80,0xd3,0x01,0x05,0x0e,0x1c] diff --git a/llvm/test/MC/AMDGPU/vop3p.s b/llvm/test/MC/AMDGPU/vop3p.s index 97c3650cdf54..cf0208467db1 100644 --- a/llvm/test/MC/AMDGPU/vop3p.s +++ b/llvm/test/MC/AMDGPU/vop3p.s @@ -169,81 +169,93 @@ v_pk_max_f16 v0, v1, v2 // GFX9: v_pk_max_f16 v0, v1, v2 ; encoding: [0x00,0x00,0x92,0xd3,0x01,0x05,0x02,0x18] v_mad_mix_f32 v0, v1, v2, v3 -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mixlo_f16 v0, v1, v2, v3 -// GFX9: v_mad_mixlo_f16 v0, v1, v2, v3 ; encoding: [0x00,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mixlo_f16 v0, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x04] v_mad_mixhi_f16 v0, v1, v2, v3 -// GFX9: v_mad_mixhi_f16 v0, v1, v2, v3 ; encoding: [0x00,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mixhi_f16 v0, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x04] // // Regular source modifiers on non-packed instructions // v_mad_mix_f32 v0, abs(v1), v2, v3 -// GFX9: v_mad_mix_f32 v0, |v1|, v2, v3 ; encoding: [0x00,0x41,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, |v1|, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x01,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, abs(v2), v3 -// GFX9: v_mad_mix_f32 v0, v1, |v2|, v3 ; encoding: [0x00,0x42,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, |v2|, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x02,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, abs(v3) -// GFX9: v_mad_mix_f32 v0, v1, v2, |v3| ; encoding: [0x00,0x44,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, |v3| op_sel_hi:[0,0,0] ; encoding: [0x00,0x04,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, -v1, v2, v3 -// GFX9: v_mad_mix_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x3c] +// GFX9: v_mad_mix_f32 v0, -v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x24] v_mad_mix_f32 v0, v1, -v2, v3 -// GFX9: v_mad_mix_f32 v0, v1, -v2, v3 ; encoding: [0x00,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x5c] +// GFX9: v_mad_mix_f32 v0, v1, -v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x44] v_mad_mix_f32 v0, v1, v2, -v3 -// GFX9: v_mad_mix_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x9c] +// GFX9: v_mad_mix_f32 v0, v1, v2, -v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x84] v_mad_mix_f32 v0, -abs(v1), v2, v3 -// GFX9: v_mad_mix_f32 v0, -|v1|, v2, v3 ; encoding: [0x00,0x41,0xa0,0xd3,0x01,0x05,0x0e,0x3c] +// GFX9: v_mad_mix_f32 v0, -|v1|, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x01,0xa0,0xd3,0x01,0x05,0x0e,0x24] v_mad_mix_f32 v0, v1, -abs(v2), v3 -// GFX9: v_mad_mix_f32 v0, v1, -|v2|, v3 ; encoding: [0x00,0x42,0xa0,0xd3,0x01,0x05,0x0e,0x5c] +// GFX9: v_mad_mix_f32 v0, v1, -|v2|, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x02,0xa0,0xd3,0x01,0x05,0x0e,0x44] v_mad_mix_f32 v0, v1, v2, -abs(v3) -// GFX9: v_mad_mix_f32 v0, v1, v2, -|v3| ; encoding: [0x00,0x44,0xa0,0xd3,0x01,0x05,0x0e,0x9c] +// GFX9: v_mad_mix_f32 v0, v1, v2, -|v3| op_sel_hi:[0,0,0] ; encoding: [0x00,0x04,0xa0,0xd3,0x01,0x05,0x0e,0x84] v_mad_mixlo_f16 v0, abs(v1), -v2, abs(v3) -// GFX9: v_mad_mixlo_f16 v0, |v1|, -v2, |v3| ; encoding: [0x00,0x45,0xa1,0xd3,0x01,0x05,0x0e,0x5c] +// GFX9: v_mad_mixlo_f16 v0, |v1|, -v2, |v3| op_sel_hi:[0,0,0] ; encoding: [0x00,0x05,0xa1,0xd3,0x01,0x05,0x0e,0x44] v_mad_mixhi_f16 v0, -v1, abs(v2), -abs(v3) -// GFX9: v_mad_mixhi_f16 v0, -v1, |v2|, -|v3| ; encoding: [0x00,0x46,0xa2,0xd3,0x01,0x05,0x0e,0xbc] +// GFX9: v_mad_mixhi_f16 v0, -v1, |v2|, -|v3| op_sel_hi:[0,0,0] ; encoding: [0x00,0x06,0xa2,0xd3,0x01,0x05,0x0e,0xa4] + +v_mad_mixlo_f16 v0, v1, v2, v3 clamp +// GFX9: v_mad_mixlo_f16 v0, v1, v2, v3 op_sel_hi:[0,0,0] clamp ; encoding: [0x00,0x80,0xa1,0xd3,0x01,0x05,0x0e,0x04] + +v_mad_mixhi_f16 v0, v1, v2, v3 clamp +// GFX9: v_mad_mixhi_f16 v0, v1, v2, v3 op_sel_hi:[0,0,0] clamp ; encoding: [0x00,0x80,0xa2,0xd3,0x01,0x05,0x0e,0x04] // // op_sel with non-packed instructions // v_mad_mix_f32 v0, v1, v2, v3 op_sel:[0,0,0] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel:[1,0,0] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x00,0x48,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[1,0,0] op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel:[0,1,0] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[0,1,0] ; encoding: [0x00,0x50,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[0,1,0] op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel:[0,0,1] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[0,0,1] ; encoding: [0x00,0x60,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[0,0,1] op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel:[1,1,1] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[1,1,1] ; encoding: [0x00,0x78,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel:[1,1,1] op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,0,0] // GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[1,0,0] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[1,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x0c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[1,0,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,1,0] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,1,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x14] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,1,0] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,0,1] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,0,1] ; encoding: [0x00,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x04] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[0,0,1] ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] v_mad_mix_f32 v0, v1, v2, v3 op_sel_hi:[1,1,1] -// GFX9: v_mad_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c] +// GFX9: v_mad_mix_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04] + +v_mad_mixlo_f16 v0, v1, v2, v3 op_sel_hi:[1,0,1] clamp +// GFX9: v_mad_mixlo_f16 v0, v1, v2, v3 op_sel_hi:[1,0,1] clamp ; encoding: [0x00,0x80,0xa1,0xd3,0x01,0x05,0x0e,0x04] + +v_mad_mixhi_f16 v0, v1, v2, v3 op_sel_hi:[1,0,1] clamp +// GFX9: v_mad_mixhi_f16 v0, v1, v2, v3 op_sel_hi:[1,0,1] clamp ; encoding: [0x00,0x80,0xa2,0xd3,0x01,0x05,0x0e,0x04]