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[X86][tablgen] Set ShouldBeEmitted to false when isAsmParserOnly is true. NFCI 

In fact, an instruction can not be emitted to disassemble table when
`isAsmParserOnly` is true, so `isAsmParserOnly=true` implies
`ShouldBeEmitted=false`.

We check `isAsmParserOnly` in X86FoldTablesEmitter.cpp at a early stage
b/c none of them is foldable.
This commit is contained in:
Shengchen Kan 2022-03-26 19:01:58 +08:00
parent 0687578728
commit c8ea732937
2 changed files with 7 additions and 11 deletions
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10
llvm/utils/TableGen/X86FoldTablesEmitter.cpp
View File

@ -344,9 +344,7 @@ public:
RegRec->getValueAsBit("hasNoTrackPrefix") != RegRec->getValueAsBit("hasNoTrackPrefix") !=
MemRec->getValueAsBit("hasNoTrackPrefix") || MemRec->getValueAsBit("hasNoTrackPrefix") ||
RegRec->getValueAsBit("EVEX_W1_VEX_W0") != RegRec->getValueAsBit("EVEX_W1_VEX_W0") !=
MemRec->getValueAsBit("EVEX_W1_VEX_W0") || MemRec->getValueAsBit("EVEX_W1_VEX_W0"))
RegRec->getValueAsBit("isAsmParserOnly") !=
MemRec->getValueAsBit("isAsmParserOnly"))
return false; return false;
// Make sure the sizes of the operands of both instructions suit each other. // Make sure the sizes of the operands of both instructions suit each other.
@ -556,10 +554,10 @@ void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) {
Target.getInstructionsByEnumValue(); Target.getInstructionsByEnumValue();
for (const CodeGenInstruction *Inst : NumberedInstructions) { for (const CodeGenInstruction *Inst : NumberedInstructions) {
if (!Inst->TheDef->getNameInit() || !Inst->TheDef->isSubClassOf("X86Inst"))
continue;
const Record *Rec = Inst->TheDef; const Record *Rec = Inst->TheDef;
if (!Rec->getNameInit() || !Rec->isSubClassOf("X86Inst") ||
Rec->getValueAsBit("isAsmParserOnly"))
continue;
// - Do not proceed if the instruction is marked as notMemoryFoldable. // - Do not proceed if the instruction is marked as notMemoryFoldable.
// - Instructions including RST register class operands are not relevant // - Instructions including RST register class operands are not relevant

8
llvm/utils/TableGen/X86RecognizableInstr.cpp
View File

@ -76,7 +76,9 @@ static uint8_t byteFromRec(const Record* rec, StringRef name) {
} }
RecognizableInstrBase::RecognizableInstrBase(const CodeGenInstruction &insn) RecognizableInstrBase::RecognizableInstrBase(const CodeGenInstruction &insn)
: Rec(insn.TheDef), ShouldBeEmitted(Rec->isSubClassOf("X86Inst")) { : Rec(insn.TheDef),
ShouldBeEmitted(Rec->isSubClassOf("X86Inst") &&
!Rec->getValueAsBit("isAsmParserOnly")) {
if (!ShouldBeEmitted) if (!ShouldBeEmitted)
return; return;
@ -134,10 +136,6 @@ void RecognizableInstr::processInstr(DisassemblerTables &tables,
const CodeGenInstruction &insn, const CodeGenInstruction &insn,
InstrUID uid) InstrUID uid)
{ {
// Ignore "asm parser only" instructions.
if (insn.TheDef->getValueAsBit("isAsmParserOnly"))
return;
RecognizableInstr recogInstr(tables, insn, uid); RecognizableInstr recogInstr(tables, insn, uid);
if (recogInstr.shouldBeEmitted()) { if (recogInstr.shouldBeEmitted()) {