From c8d2b0135a387d12354ac7379fa0f47a2c8eb2a7 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Tue, 18 Nov 2008 21:29:14 +0000 Subject: [PATCH] Don't set neverHasSideEffects on x86's divide instructions, since they trap on divide-by-zero, and this side effect is otherwise unmodeled. llvm-svn: 59551 --- llvm/lib/Target/X86/X86Instr64bit.td | 2 -- llvm/lib/Target/X86/X86InstrInfo.td | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/llvm/lib/Target/X86/X86Instr64bit.td b/llvm/lib/Target/X86/X86Instr64bit.td index 125eefbf518b..98ad32c550dd 100644 --- a/llvm/lib/Target/X86/X86Instr64bit.td +++ b/llvm/lib/Target/X86/X86Instr64bit.td @@ -474,7 +474,6 @@ def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem, // GR64 = [mem64]*I8 } // Defs = [EFLAGS] // Unsigned division / remainder -let neverHasSideEffects = 1 in { let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in { def DIV64r : RI<0xF7, MRM6r, (outs), (ins GR64:$src), // RDX:RAX/r64 = RAX,RDX "div{q}\t$src", []>; @@ -488,7 +487,6 @@ def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src), // RDX:RAX/[mem64] "idiv{q}\t$src", []>; } } -} // Unary instructions let Defs = [EFLAGS], CodeSize = 2 in { diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 128f12de77c5..fd463973fdac 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -747,6 +747,7 @@ let Defs = [EAX,EDX], Uses = [EAX] in def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src), "imul{l}\t$src", []>; // EAX,EDX = EAX*[mem32] } +} // neverHasSideEffects // unsigned division/remainder let Defs = [AL,AH,EFLAGS], Uses = [AX] in @@ -791,7 +792,6 @@ let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src), // EDX:EAX/[mem32] = EAX,EDX "idiv{l}\t$src", []>; } -} // neverHasSideEffects //===----------------------------------------------------------------------===// // Two address Instructions.