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add basic encoding support for immediates and registers, allowing us 

to encode all of these instructions correctly (for example):

        mflr r0                         ; encoding: [0x7c,0x08,0x02,0xa6]
        stw r0, 8(r1)                   ; encoding: [0x90,0x01,0x00,0x08]
        stwu r1, -64(r1)                ; encoding: [0x94,0x21,0xff,0xc0]

llvm-svn: 119118
This commit is contained in:
Chris Lattner 2010-11-15 04:51:55 +00:00
parent 0ae07e1484
commit c877d8f44c
2 changed files with 8 additions and 4 deletions
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5
llvm/lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -295,9 +295,7 @@ def calltarget : Operand<iPTR> {
def aaddr : Operand<iPTR> {
let PrintMethod = "printAbsAddrOperand";
}
def piclabel: Operand<iPTR> {
let PrintMethod = "printPICLabel";
}
def piclabel: Operand<iPTR> {}
def symbolHi: Operand<i32> {
let PrintMethod = "printSymbolHi";
}
@ -321,7 +319,6 @@ def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits.
let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg);
}
def tocentry : Operand<iPTR> {
let PrintMethod = "printTOCEntryLabel";
let MIOperandInfo = (ops i32imm:$imm);
}

7
llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp
View File

@ -13,6 +13,7 @@
#define DEBUG_TYPE "mccodeemitter"
#include "PPC.h"
#include "PPCRegisterInfo.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCInst.h"
#include "llvm/ADT/Statistic.h"
@ -91,6 +92,12 @@ MCCodeEmitter *llvm::createPPCMCCodeEmitter(const Target &, TargetMachine &TM,
unsigned PPCMCCodeEmitter::
getMachineOpValue(const MCInst &MI, const MCOperand &MO,
SmallVectorImpl<MCFixup> &Fixups) const {
if (MO.isReg())
return PPCRegisterInfo::getRegisterNumbering(MO.getReg());
if (MO.isImm())
return MO.getImm();
// FIXME.
return 0;
}