forked from OSchip/llvm-project
Add XCore intrinsics for setclk, setrdy.
llvm-svn: 127761
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@ -53,6 +53,10 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
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def int_xcore_setv : Intrinsic<[],[llvm_anyptr_ty, llvm_ptr_ty],
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def int_xcore_setv : Intrinsic<[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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[NoCapture<0>]>;
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def int_xcore_eeu : Intrinsic<[],[llvm_anyptr_ty], [NoCapture<0>]>;
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def int_xcore_eeu : Intrinsic<[],[llvm_anyptr_ty], [NoCapture<0>]>;
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def int_xcore_setclk : Intrinsic<[],[llvm_anyptr_ty, llvm_anyptr_ty],
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[NoCapture<0>, NoCapture<1>]>;
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def int_xcore_setrdy : Intrinsic<[],[llvm_anyptr_ty, llvm_anyptr_ty],
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[NoCapture<0>, NoCapture<1>]>;
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// Intrinsics for events.
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// Intrinsics for events.
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def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>;
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def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>;
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@ -838,7 +838,7 @@ def SETD_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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[(int_xcore_setd GRRegs:$r, GRRegs:$val)]>;
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[(int_xcore_setd GRRegs:$r, GRRegs:$val)]>;
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// Two operand long
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// Two operand long
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// TODO setclk, setrdy, setpsc, endin, peek,
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// TODO setpsc, endin, peek,
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// getd, testlcl, tinitlr
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// getd, testlcl, tinitlr
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def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
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def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
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"bitrev $dst, $src",
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"bitrev $dst, $src",
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@ -868,6 +868,14 @@ def SETPS_l2r : _FL2R<(outs), (ins GRRegs:$src1, GRRegs:$src2),
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"set ps[$src1], $src2",
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"set ps[$src1], $src2",
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[(int_xcore_setps GRRegs:$src1, GRRegs:$src2)]>;
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[(int_xcore_setps GRRegs:$src1, GRRegs:$src2)]>;
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def SETCLK_l2r : _FL2R<(outs), (ins GRRegs:$src1, GRRegs:$src2),
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"setclk res[$src1], $src2",
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[(int_xcore_setclk GRRegs:$src1, GRRegs:$src2)]>;
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def SETRDY_l2r : _FL2R<(outs), (ins GRRegs:$src1, GRRegs:$src2),
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"setrdy res[$src1], $src2",
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[(int_xcore_setrdy GRRegs:$src1, GRRegs:$src2)]>;
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// One operand short
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// One operand short
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// TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, clrtp
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// TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, clrtp
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// setdp, setcp, setev, kcall
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// setdp, setcp, setev, kcall
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@ -19,6 +19,8 @@ declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
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declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
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declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
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declare void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
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define i8 addrspace(1)* @getr() {
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define i8 addrspace(1)* @getr() {
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; CHECK: getr:
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; CHECK: getr:
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@ -174,3 +176,17 @@ define void @eeu(i8 addrspace(1)* %r) {
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call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
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call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
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ret void
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ret void
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}
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}
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define void @setclk(i8 addrspace(1)* %a, i8 addrspace(1)* %b) {
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; CHECK: setclk
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; CHECK: setclk res[r0], r1
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call void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
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ret void
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}
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define void @setrdy(i8 addrspace(1)* %a, i8 addrspace(1)* %b) {
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; CHECK: setrdy
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; CHECK: setrdy res[r0], r1
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call void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
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ret void
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}
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