forked from OSchip/llvm-project
Use autogenerate check in CodeGen/X86/pr16031.ll . NFC
llvm-svn: 294761
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx -enable-misched=false | FileCheck %s
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; CHECK-LABEL: main:
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; CHECK: pushl %esi
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; CHECK-NEXT: testb $1, 8(%esp)
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; CHECK-NEXT: movl $-12, %eax
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; CHECK-NEXT: movl $-1, %edx
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; CHECK-NEXT: cmovel %edx, %eax
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: addl $-1, %esi
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; CHECK-NEXT: movl $-1, %esi
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; CHECK-NEXT: adcl $-1, %esi
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; CHECK-NEXT: cmovsl %ecx, %eax
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; CHECK-NEXT: cmovsl %ecx, %edx
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; CHECK-NEXT: popl %esi
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define i64 @main(i1 %tobool1) nounwind {
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; CHECK-LABEL: main:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl $-12, %eax
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; CHECK-NEXT: movl $-1, %edx
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; CHECK-NEXT: cmovel %edx, %eax
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: addl $-1, %esi
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; CHECK-NEXT: movl $-1, %esi
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; CHECK-NEXT: adcl $-1, %esi
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; CHECK-NEXT: cmovsl %ecx, %eax
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; CHECK-NEXT: cmovsl %ecx, %edx
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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entry:
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%0 = zext i1 %tobool1 to i32
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%. = xor i32 %0, 1
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