forked from OSchip/llvm-project
parent
4578098b97
commit
c83cfb9dfa
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@ -95,12 +95,8 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
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FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
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FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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CodeGenOpt::Level OptLevel);
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FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
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MachineCodeEmitter &MCE);
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FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
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FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
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JITCodeEmitter &JCE);
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JITCodeEmitter &JCE);
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FunctionPass *createARMObjectCodeEmitterPass(ARMBaseTargetMachine &TM,
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ObjectCodeEmitter &OCE);
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FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
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FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
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FunctionPass *createARMExpandPseudoPass();
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FunctionPass *createARMExpandPseudoPass();
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@ -180,21 +180,12 @@ namespace {
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char Emitter<CodeEmitter>::ID = 0;
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char Emitter<CodeEmitter>::ID = 0;
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}
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}
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/// createARMCodeEmitterPass - Return a pass that emits the collected ARM code
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/// createARMJITCodeEmitterPass - Return a pass that emits the collected ARM
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/// to the specified MCE object.
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/// code to the specified MCE object.
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FunctionPass *llvm::createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
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MachineCodeEmitter &MCE) {
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return new Emitter<MachineCodeEmitter>(TM, MCE);
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}
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FunctionPass *llvm::createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
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FunctionPass *llvm::createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
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JITCodeEmitter &JCE) {
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JITCodeEmitter &JCE) {
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return new Emitter<JITCodeEmitter>(TM, JCE);
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return new Emitter<JITCodeEmitter>(TM, JCE);
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}
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}
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FunctionPass *llvm::createARMObjectCodeEmitterPass(ARMBaseTargetMachine &TM,
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ObjectCodeEmitter &OCE) {
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return new Emitter<ObjectCodeEmitter>(TM, OCE);
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}
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template<class CodeEmitter>
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template<class CodeEmitter>
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bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
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bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
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@ -131,18 +131,6 @@ bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
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return true;
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return true;
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}
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}
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bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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// FIXME: Move this to TargetJITInfo!
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if (DefRelocModel == Reloc::Default)
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setRelocationModel(Reloc::Static);
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// Machine code emitter pass for ARM.
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PM.add(createARMCodeEmitterPass(*this, MCE));
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return false;
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}
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bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
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bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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JITCodeEmitter &JCE) {
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@ -154,15 +142,3 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
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PM.add(createARMJITCodeEmitterPass(*this, JCE));
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PM.add(createARMJITCodeEmitterPass(*this, JCE));
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return false;
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return false;
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}
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}
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bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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// FIXME: Move this to TargetJITInfo!
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if (DefRelocModel == Reloc::Default)
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setRelocationModel(Reloc::Static);
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// Machine code emitter pass for ARM.
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PM.add(createARMObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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@ -52,12 +52,8 @@ public:
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virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreSched2(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreSched2(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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JITCodeEmitter &MCE);
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JITCodeEmitter &MCE);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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};
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};
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/// ARMTargetMachine - ARM target machine.
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/// ARMTargetMachine - ARM target machine.
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