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[Hexagon] Generate multiply-high instruction in isel 

llvm-svn: 305302
This commit is contained in:
Krzysztof Parzyszek 2017-06-13 16:21:57 +00:00
parent 7e9d2cb553
commit c83c267b84
2 changed files with 32 additions and 0 deletions
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5
llvm/lib/Target/Hexagon/HexagonPatterns.td
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@ -401,6 +401,11 @@ def Aext64: PatFrag<(ops node:$Rs), (i64 (anyext node:$Rs))>;
def Zext64: PatFrag<(ops node:$Rs), (i64 (zext node:$Rs))>;
def Sext64: PatLeaf<(i64 Usxtw:$Rs)>;
def: Pat<(i32 (trunc (sra (mul Sext64:$Rs, Sext64:$Rt), (i32 32)))),
(M2_mpy_up (LoReg Sext64:$Rs), (LoReg Sext64:$Rt))>;
def: Pat<(i32 (trunc (srl (mul Sext64:$Rs, Sext64:$Rt), (i32 32)))),
(M2_mpy_up (LoReg Sext64:$Rs), (LoReg Sext64:$Rt))>;
def: Pat<(mul (Aext64 I32:$Rs), (Aext64 I32:$Rt)),
(M2_dpmpyuu_s0 I32:$Rs, I32:$Rt)>;

27
llvm/test/CodeGen/Hexagon/mulh.ll Normal file
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@ -0,0 +1,27 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
target triple = "hexagon"
; CHECK-LABEL: danny:
; CHECK: r{{[0-9]+}} = mpy(r0,r1)
define i32 @danny(i32 %a0, i32 %a1) {
b2:
%v3 = sext i32 %a0 to i64
%v4 = sext i32 %a1 to i64
%v5 = mul nsw i64 %v3, %v4
%v6 = ashr i64 %v5, 32
%v7 = trunc i64 %v6 to i32
ret i32 %v7
}
; CHECK-LABEL: sammy:
; CHECK: r{{[0-9]+}} = mpy(r0,r1)
define i32 @sammy(i32 %a0, i32 %a1) {
b2:
%v3 = sext i32 %a0 to i64
%v4 = sext i32 %a1 to i64
%v5 = mul nsw i64 %v3, %v4
%v6 = lshr i64 %v5, 32
%v7 = trunc i64 %v6 to i32
ret i32 %v7
}