forked from OSchip/llvm-project
Separate V6 from V6T2 since the latter has some extra nice instructions
llvm-svn: 73085
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@ -28,6 +28,8 @@ def ArchV5TE : SubtargetFeature<"v5te", "ARMArchVersion", "V5TE",
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"ARM v5TE, v5TEj, v5TExp">;
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def ArchV6 : SubtargetFeature<"v6", "ARMArchVersion", "V6",
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"ARM v6">;
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def ArchV6T2 : SubtargetFeature<"v6t2", "ARMArchVersion", "V6T2",
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"ARM v6t2">;
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def ArchV7A : SubtargetFeature<"v7a", "ARMArchVersion", "V7A",
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"ARM v7A">;
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def FeatureVFP2 : SubtargetFeature<"vfp2", "ARMFPUType", "VFPv2",
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@ -92,9 +94,11 @@ def : Proc<"arm1176jzf-s", [ArchV6, FeatureVFP2]>;
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def : Proc<"mpcorenovfp", [ArchV6]>;
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def : Proc<"mpcore", [ArchV6, FeatureVFP2]>;
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def : Proc<"arm1156t2-s", [ArchV6, FeatureThumb2]>;
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def : Proc<"arm1156t2f-s", [ArchV6, FeatureThumb2, FeatureVFP2]>;
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// V6T2 Processors.
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def : Proc<"arm1156t2-s", [ArchV6T2, FeatureThumb2]>;
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def : Proc<"arm1156t2f-s", [ArchV6T2, FeatureThumb2, FeatureVFP2]>;
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// V7 Processors.
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def : Proc<"cortex-a8", [ArchV7A, FeatureThumb2, FeatureNEON]>;
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def : Proc<"cortex-a9", [ArchV7A, FeatureThumb2, FeatureNEON]>;
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@ -23,7 +23,7 @@ class Module;
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class ARMSubtarget : public TargetSubtarget {
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protected:
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enum ARMArchEnum {
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V4T, V5T, V5TE, V6, V7A
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V4T, V5T, V5TE, V6, V6T2, V7A
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};
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enum ARMFPEnum {
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@ -92,6 +92,7 @@ protected:
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bool hasV5TOps() const { return ARMArchVersion >= V5T; }
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bool hasV5TEOps() const { return ARMArchVersion >= V5TE; }
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bool hasV6Ops() const { return ARMArchVersion >= V6; }
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bool hasV6T2Ops() const { return ARMArchVersion >= V6T2; }
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bool hasV7Ops() const { return ARMArchVersion >= V7A; }
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bool hasVFP2() const { return ARMFPUType >= VFPv2; }
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