forked from OSchip/llvm-project
[gvn] PRE needs to skip convergent intrinsics/calls.
- As convergent intrinsics/calls could only be moved to control-equivalent blocks, or more precisely the same divergent branch, PRE needs to skip them. Differential Revision: https://reviews.llvm.org/D90391
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@ -2460,10 +2460,14 @@ bool GVN::performScalarPRE(Instruction *CurInst) {
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if (isa<GetElementPtrInst>(CurInst))
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return false;
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// We don't currently value number ANY inline asm calls.
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if (auto *CallB = dyn_cast<CallBase>(CurInst))
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if (auto *CallB = dyn_cast<CallBase>(CurInst)) {
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// We don't currently value number ANY inline asm calls.
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if (CallB->isInlineAsm())
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return false;
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// Don't do PRE on convergent calls.
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if (CallB->isConvergent())
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return false;
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}
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uint32_t ValNo = VN.lookup(CurInst);
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@ -0,0 +1,36 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -gvn -o - %s | FileCheck %s
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; RUN: opt -S -passes=gvn -o - %s | FileCheck %s
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define i32 @foo(i1 %cond, i32* %q, i32* %p) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[V0:%.*]] = call i32 @llvm.convergent(i32 0)
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; CHECK-NEXT: store i32 [[V0]], i32* [[Q:%.*]], align 4
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[PRE:%.*]], label [[MERGE:%.*]]
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; CHECK: pre:
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; CHECK-NEXT: [[T0:%.*]] = load i32, i32* [[P:%.*]], align 4
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; CHECK-NEXT: br label [[MERGE]]
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; CHECK: merge:
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; CHECK-NEXT: [[M0:%.*]] = phi i32 [ [[T0]], [[PRE]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[R0:%.*]] = call i32 @llvm.convergent(i32 [[M0]])
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; CHECK-NEXT: ret i32 [[R0]]
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;
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entry:
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%v0 = call i32 @llvm.convergent(i32 0)
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store i32 %v0, i32* %q
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br i1 %cond, label %pre, label %merge
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pre:
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%t0 = load i32, i32* %p
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br label %merge
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merge:
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%m0 = phi i32 [ %t0, %pre ], [ 0, %entry ]
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%r0 = call i32 @llvm.convergent(i32 %m0)
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ret i32 %r0
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}
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declare i32 @llvm.convergent(i32) #0
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attributes #0 = { convergent nounwind readnone }
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