forked from OSchip/llvm-project
IRgen: Move CGBitFieldInfo strategy computation helpers to static member
functions. llvm-svn: 112913
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@ -144,6 +144,21 @@ public:
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void print(llvm::raw_ostream &OS) const;
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void dump() const;
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/// \brief Given a bit-field decl, build an appropriate helper object for
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/// accessing that field (which is expected to have the given offset and
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/// size).
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static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types, const FieldDecl *FD,
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uint64_t FieldOffset, uint64_t FieldSize);
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/// \brief Given a bit-field decl, build an appropriate helper object for
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/// accessing that field (which is expected to have the given offset and
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/// size). The field decl should be known to be contained within a type of at
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/// least the given size and with the given alignment.
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static CGBitFieldInfo MakeInfo(CodeGenTypes &Types, const FieldDecl *FD,
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uint64_t FieldOffset, uint64_t FieldSize,
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uint64_t ContainingTypeSizeInBits,
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unsigned ContainingTypeAlign);
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};
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/// CGRecordLayout - This class handles struct and union layout info while
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@ -157,15 +157,12 @@ void CGRecordLayoutBuilder::Layout(const RecordDecl *D) {
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LayoutFields(D);
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}
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static CGBitFieldInfo ComputeBitFieldInfo(CodeGenTypes &Types,
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const FieldDecl *FD,
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uint64_t FieldOffset,
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uint64_t FieldSize) {
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const RecordDecl *RD = FD->getParent();
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const ASTRecordLayout &RL = Types.getContext().getASTRecordLayout(RD);
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uint64_t ContainingTypeSizeInBits = RL.getSize();
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unsigned ContainingTypeAlign = RL.getAlignment();
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CGBitFieldInfo CGBitFieldInfo::MakeInfo(CodeGenTypes &Types,
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const FieldDecl *FD,
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uint64_t FieldOffset,
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uint64_t FieldSize,
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uint64_t ContainingTypeSizeInBits,
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unsigned ContainingTypeAlign) {
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const llvm::Type *Ty = Types.ConvertTypeForMemRecursive(FD->getType());
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uint64_t TypeSizeInBytes = Types.getTargetData().getTypeAllocSize(Ty);
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uint64_t TypeSizeInBits = TypeSizeInBytes * 8;
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@ -255,6 +252,19 @@ static CGBitFieldInfo ComputeBitFieldInfo(CodeGenTypes &Types,
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return CGBitFieldInfo(FieldSize, NumComponents, Components, IsSigned);
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}
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CGBitFieldInfo CGBitFieldInfo::MakeInfo(CodeGenTypes &Types,
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const FieldDecl *FD,
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uint64_t FieldOffset,
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uint64_t FieldSize) {
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const RecordDecl *RD = FD->getParent();
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const ASTRecordLayout &RL = Types.getContext().getASTRecordLayout(RD);
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uint64_t ContainingTypeSizeInBits = RL.getSize();
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unsigned ContainingTypeAlign = RL.getAlignment();
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return MakeInfo(Types, FD, FieldOffset, FieldSize, ContainingTypeSizeInBits,
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ContainingTypeAlign);
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}
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void CGRecordLayoutBuilder::LayoutBitField(const FieldDecl *D,
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uint64_t FieldOffset) {
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uint64_t FieldSize =
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@ -287,7 +297,8 @@ void CGRecordLayoutBuilder::LayoutBitField(const FieldDecl *D,
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// Add the bit field info.
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LLVMBitFields.push_back(
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LLVMBitFieldInfo(D, ComputeBitFieldInfo(Types, D, FieldOffset, FieldSize)));
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LLVMBitFieldInfo(D, CGBitFieldInfo::MakeInfo(Types, D, FieldOffset,
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FieldSize)));
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AppendBytes(NumBytesToAppend);
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@ -379,7 +390,8 @@ CGRecordLayoutBuilder::LayoutUnionField(const FieldDecl *Field,
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// Add the bit field info.
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LLVMBitFields.push_back(
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LLVMBitFieldInfo(Field, ComputeBitFieldInfo(Types, Field, 0, FieldSize)));
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LLVMBitFieldInfo(Field, CGBitFieldInfo::MakeInfo(Types, Field,
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0, FieldSize)));
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return FieldTy;
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}
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