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Fix a bug where the x86 backend would reject 64-bit r constraints when 

in 32-bit mode instead of assigning a register pair.  This has nothing to
do with PR2356, but I happened to notice it while working on it.

llvm-svn: 57704
This commit is contained in:
Chris Lattner 2008-10-17 17:59:52 +00:00
parent 052092bf9c
commit c7e65f4377
2 changed files with 10 additions and 1 deletions
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2
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -7511,7 +7511,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
case 'l': // INDEX_REGS
if (VT == MVT::i64 && Subtarget->is64Bit())
return std::make_pair(0U, X86::GR64RegisterClass);
if (VT == MVT::i32)
if (VT == MVT::i32 || VT == MVT::i64)
return std::make_pair(0U, X86::GR32RegisterClass);
else if (VT == MVT::i16)
return std::make_pair(0U, X86::GR16RegisterClass);

9
llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll Normal file
View File

@ -0,0 +1,9 @@
; RUN: llvm-as < %s | llc -march=x86
; RUN: llvm-as < %s | llc -march=x86-64
define void @test(i64 %x) nounwind {
entry:
tail call void asm sideeffect "ASM: $0", "r,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
ret void
}