forked from OSchip/llvm-project
parent
519675bbf5
commit
c7d721aa03
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@ -117,17 +117,15 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
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MachineBasicBlock::const_iterator I,
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MachineBasicBlock::const_iterator E) {
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unsigned LookAheadLeft = 5;
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while (LookAheadLeft--) {
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while (LookAheadLeft) {
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if (I == E)
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// Reached end of block, register is obviously dead.
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return true;
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if (I->isDebugValue()) {
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// These must not count against the limit.
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++LookAheadLeft;
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// Skip over dbg_value's.
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while (I->isDebugValue())
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++I;
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continue;
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}
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bool SeenDef = false;
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for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = I->getOperand(i);
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@ -143,6 +141,8 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
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// See a def of Reg (or an alias) before encountering any use, it's
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// trivially dead.
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return true;
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--LookAheadLeft;
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++I;
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}
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return false;
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