forked from OSchip/llvm-project
Allow set operators with multiple destinations, i.e. (set x, y, (op a, b)).
llvm-svn: 41861
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@ -676,14 +676,20 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
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// special handling for set, which isn't really an SDNode.
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if (getOperator()->getName() == "set") {
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assert (getNumChildren() == 2 && "Only handle 2 operand set's for now!");
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bool MadeChange = getChild(0)->ApplyTypeConstraints(TP, NotRegisters);
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MadeChange |= getChild(1)->ApplyTypeConstraints(TP, NotRegisters);
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assert (getNumChildren() >= 2 && "Missing RHS of a set?");
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unsigned NC = getNumChildren();
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bool MadeChange = false;
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for (unsigned i = 0; i < NC-1; ++i) {
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MadeChange = getChild(i)->ApplyTypeConstraints(TP, NotRegisters);
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MadeChange |= getChild(NC-1)->ApplyTypeConstraints(TP, NotRegisters);
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// Types of operands must match.
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MadeChange |= getChild(0)->UpdateNodeType(getChild(1)->getExtTypes(), TP);
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MadeChange |= getChild(1)->UpdateNodeType(getChild(0)->getExtTypes(), TP);
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MadeChange |= UpdateNodeType(MVT::isVoid, TP);
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// Types of operands must match.
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MadeChange |= getChild(i)->UpdateNodeType(getChild(NC-1)->getExtTypes(),
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TP);
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MadeChange |= getChild(NC-1)->UpdateNodeType(getChild(i)->getExtTypes(),
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TP);
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MadeChange |= UpdateNodeType(MVT::isVoid, TP);
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}
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return MadeChange;
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} else if (getOperator() == ISE.get_intrinsic_void_sdnode() ||
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getOperator() == ISE.get_intrinsic_w_chain_sdnode() ||
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@ -1316,6 +1322,7 @@ static bool HandleUse(TreePattern *I, TreePatternNode *Pat,
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I->error("Input " + DI->getDef()->getName() + " must be named!");
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else if (DI && DI->getDef()->isSubClassOf("Register"))
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InstImpInputs.push_back(DI->getDef());
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;
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}
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return false;
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}
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@ -1393,15 +1400,13 @@ FindPatternInputsAndOutputs(TreePattern *I, TreePatternNode *Pat,
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// Otherwise, this is a set, validate and collect instruction results.
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if (Pat->getNumChildren() == 0)
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I->error("set requires operands!");
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else if (Pat->getNumChildren() & 1)
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I->error("set requires an even number of operands");
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if (Pat->getTransformFn())
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I->error("Cannot specify a transform function on a set node!");
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// Check the set destinations.
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unsigned NumValues = Pat->getNumChildren()/2;
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for (unsigned i = 0; i != NumValues; ++i) {
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unsigned NumDests = Pat->getNumChildren()-1;
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for (unsigned i = 0; i != NumDests; ++i) {
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TreePatternNode *Dest = Pat->getChild(i);
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if (!Dest->isLeaf())
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I->error("set destination should be a register!");
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@ -1419,15 +1424,16 @@ FindPatternInputsAndOutputs(TreePattern *I, TreePatternNode *Pat,
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InstResults[Dest->getName()] = Dest;
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} else if (Val->getDef()->isSubClassOf("Register")) {
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InstImpResults.push_back(Val->getDef());
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;
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} else {
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I->error("set destination should be a register!");
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}
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// Verify and collect info from the computation.
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FindPatternInputsAndOutputs(I, Pat->getChild(i+NumValues),
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InstInputs, InstResults,
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InstImpInputs, InstImpResults);
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}
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// Verify and collect info from the computation.
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FindPatternInputsAndOutputs(I, Pat->getChild(NumDests),
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InstInputs, InstResults,
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InstImpInputs, InstImpResults);
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}
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/// ParseInstructions - Parse all of the instructions, inlining and resolving
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@ -1644,10 +1650,7 @@ void DAGISelEmitter::ParseInstructions() {
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TreePatternNode *Pattern = I->getTree(0);
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TreePatternNode *SrcPattern;
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if (Pattern->getOperator()->getName() == "set") {
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if (Pattern->getNumChildren() != 2)
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continue; // Not a set of a single value (not handled so far)
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SrcPattern = Pattern->getChild(1)->clone();
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SrcPattern = Pattern->getChild(Pattern->getNumChildren()-1)->clone();
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} else{
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// Not a set (store or something?)
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SrcPattern = Pattern;
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@ -2759,7 +2762,7 @@ public:
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isRoot ? (InstPat ? InstPat->getOnlyTree() : Pattern)
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: (InstPat ? InstPat->getOnlyTree() : NULL);
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if (InstPatNode && InstPatNode->getOperator()->getName() == "set") {
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InstPatNode = InstPatNode->getChild(1);
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InstPatNode = InstPatNode->getChild(InstPatNode->getNumChildren()-1);
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}
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bool HasVarOps = isRoot && II.hasVariableNumberOfOperands;
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bool HasImpInputs = isRoot && Inst.getNumImpOperands() > 0;
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