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Use SelectionDAG::getShiftAmountConstant(). NFCI.

This commit is contained in:
Simon Pilgrim 2020-01-22 13:47:58 +00:00
parent 2accdb6ae1
commit c784e5451b
1 changed files with 1 additions and 3 deletions
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4
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -28808,7 +28808,6 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
return; return;
} }
case ISD::ABS: { case ISD::ABS: {
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
assert(N->getValueType(0) == MVT::i64 && assert(N->getValueType(0) == MVT::i64 &&
"Unexpected type (!= i64) on ABS."); "Unexpected type (!= i64) on ABS.");
MVT HalfT = MVT::i32; MVT HalfT = MVT::i32;
@ -28821,8 +28820,7 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
DAG.getConstant(1, dl, HalfT)); DAG.getConstant(1, dl, HalfT));
Tmp = DAG.getNode( Tmp = DAG.getNode(
ISD::SRA, dl, HalfT, Hi, ISD::SRA, dl, HalfT, Hi,
DAG.getConstant(HalfT.getSizeInBits() - 1, dl, DAG.getShiftAmountConstant(HalfT.getSizeInBits() - 1, HalfT, dl));
TLI.getShiftAmountTy(HalfT, DAG.getDataLayout())));
Lo = DAG.getNode(ISD::UADDO, dl, VTList, Tmp, Lo); Lo = DAG.getNode(ISD::UADDO, dl, VTList, Tmp, Lo);
Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Tmp, Hi, Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Tmp, Hi,
SDValue(Lo.getNode(), 1)); SDValue(Lo.getNode(), 1));