forked from OSchip/llvm-project
On last fix to the early tail duplication.
With this I am able to bootstrap clang with early tail duplication enabled for any small bb and setting tail-dup-size to a relatively large value(8) to stress this code. llvm-svn: 132816
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@ -82,7 +82,8 @@ namespace {
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MachineBasicBlock *PredBB,
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DenseMap<unsigned, unsigned> &LocalVRMap,
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SmallVector<std::pair<unsigned,unsigned>, 4> &Copies,
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const DenseSet<unsigned> &UsedByPhi);
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const DenseSet<unsigned> &UsedByPhi,
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bool Remove);
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void DuplicateInstruction(MachineInstr *MI,
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MachineBasicBlock *TailBB,
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MachineBasicBlock *PredBB,
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@ -336,7 +337,8 @@ void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
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MachineBasicBlock *PredBB,
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DenseMap<unsigned, unsigned> &LocalVRMap,
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SmallVector<std::pair<unsigned,unsigned>, 4> &Copies,
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const DenseSet<unsigned> &RegsUsedByPhi) {
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const DenseSet<unsigned> &RegsUsedByPhi,
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bool Remove) {
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unsigned DefReg = MI->getOperand(0).getReg();
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unsigned SrcOpIdx = getPHISrcRegOpIdx(MI, PredBB);
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assert(SrcOpIdx && "Unable to find matching PHI source?");
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@ -351,6 +353,9 @@ void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
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if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg))
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AddSSAUpdateEntry(DefReg, NewDef, PredBB);
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if (!Remove)
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return;
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// Remove PredBB from the PHI node.
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MI->RemoveOperand(SrcOpIdx+1);
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MI->RemoveOperand(SrcOpIdx);
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@ -594,7 +599,7 @@ TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
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if (MI->isPHI()) {
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// Replace the uses of the def of the PHI with the register coming
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// from PredBB.
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ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi);
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ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, true);
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} else {
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// Replace def of virtual registers with new registers, and update
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// uses with PHI source register or the new registers.
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@ -644,7 +649,7 @@ TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
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// Replace the uses of the def of the PHI with the register coming
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// from PredBB.
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MachineInstr *MI = &*I++;
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ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos, UsedByPhi);
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ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos, UsedByPhi, true);
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if (MI->getParent())
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MI->eraseFromParent();
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}
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@ -675,6 +680,57 @@ TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
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Changed = true;
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}
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// If this is after register allocation, there are no phis to fix.
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if (!PreRegAlloc)
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return Changed;
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// If we made no changes so far, we are safe.
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if (!Changed)
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return Changed;
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// Handle the nasty case in that we duplicated a block that is part of a loop
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// into some but not all of its predecessors. For example:
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// 1 -> 2 <-> 3
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// \
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// \---> rest
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// if we duplicate 2 into 1 but not into 3, we end up with
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// 12 -> 3 <-> 2 -> rest
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// \ /
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// \----->-----/
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// If there was a "var = phi(1, 3)" in 2, it has to be ultimately replaced
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// with a phi in 3 (which now dominates 2).
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// What we do here is introduce a copy in 3 of the register defined by the
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// phi, just like when we are duplicating 2 into 3, but we don't copy any
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// real instructions or remove the 3 -> 2 edge from the phi in 2.
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for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
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PE = Preds.end(); PI != PE; ++PI) {
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MachineBasicBlock *PredBB = *PI;
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if (std::find(TDBBs.begin(), TDBBs.end(), PredBB) != TDBBs.end())
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continue;
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// EH edges
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if (PredBB->succ_size() != 1)
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continue;
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DenseMap<unsigned, unsigned> LocalVRMap;
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SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
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MachineBasicBlock::iterator I = TailBB->begin();
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// Process PHI instructions first.
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while (I != TailBB->end() && I->isPHI()) {
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// Replace the uses of the def of the PHI with the register coming
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// from PredBB.
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MachineInstr *MI = &*I++;
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ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, false);
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}
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MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
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for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
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Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
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TII->get(TargetOpcode::COPY),
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CopyInfos[i].first).addReg(CopyInfos[i].second));
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}
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}
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return Changed;
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}
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