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R600/SI: Use NAME rather than opName as the key to the MCOpcode tables 

This lets us drop a parameter the opName parameter to the VINTRP
multiclass and makes it possible to create multiple VINTRP defs
with the same asm mnemonic.

llvm-svn: 238146
This commit is contained in:
Tom Stellard 2015-05-25 16:15:50 +00:00
parent 5944ee2179
commit c70cf90d09
2 changed files with 7 additions and 7 deletions
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8
llvm/lib/Target/R600/SIInstrInfo.td
View File

@ -1770,16 +1770,16 @@ class VINTRP_Real_vi <bits <2> op, string opName, dag outs, dag ins,
VINTRPe_vi <op>,
SIMCInstr<opName, SISubtarget.VI>;
multiclass VINTRP_m <bits <2> op, string opName, dag outs, dag ins, string asm,
multiclass VINTRP_m <bits <2> op, dag outs, dag ins, string asm,
list<dag> pattern = [],
string disableEncoding = "", string constraints = ""> {
let DisableEncoding = disableEncoding,
Constraints = constraints in {
def "" : VINTRP_Pseudo <opName, outs, ins, pattern>;
def "" : VINTRP_Pseudo <NAME, outs, ins, pattern>;
def _si : VINTRP_Real_si <op, opName, outs, ins, asm>;
def _si : VINTRP_Real_si <op, NAME, outs, ins, asm>;
def _vi : VINTRP_Real_vi <op, opName, outs, ins, asm>;
def _vi : VINTRP_Real_vi <op, NAME, outs, ins, asm>;
}
}

6
llvm/lib/Target/R600/SIInstructions.td
View File

@ -1437,7 +1437,7 @@ let Uses = [M0] in {
// FIXME: Specify SchedRW for VINTRP insturctions.
defm V_INTERP_P1_F32 : VINTRP_m <
0x00000000, "v_interp_p1_f32",
0x00000000,
(outs VGPR_32:$dst),
(ins VGPR_32:$i, i32imm:$attr_chan, i32imm:$attr),
"v_interp_p1_f32 $dst, $i, $attr_chan, $attr, [m0]",
@ -1445,7 +1445,7 @@ defm V_INTERP_P1_F32 : VINTRP_m <
(i32 imm:$attr)))]>;
defm V_INTERP_P2_F32 : VINTRP_m <
0x00000001, "v_interp_p2_f32",
0x00000001,
(outs VGPR_32:$dst),
(ins VGPR_32:$src0, VGPR_32:$j, i32imm:$attr_chan, i32imm:$attr),
"v_interp_p2_f32 $dst, [$src0], $j, $attr_chan, $attr, [m0]",
@ -1455,7 +1455,7 @@ defm V_INTERP_P2_F32 : VINTRP_m <
"$src0 = $dst">;
defm V_INTERP_MOV_F32 : VINTRP_m <
0x00000002, "v_interp_mov_f32",
0x00000002,
(outs VGPR_32:$dst),
(ins InterpSlot:$src0, i32imm:$attr_chan, i32imm:$attr),
"v_interp_mov_f32 $dst, $src0, $attr_chan, $attr, [m0]",