[mips] Add runtime options to enable/disable madd.fmt and msub.fmt

Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
generation of madd.fmt and similar instructions respectively, as per GCC.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D33401

llvm-svn: 304929
This commit is contained in:
Petar Jovanovic 2017-06-07 17:17:57 +00:00
parent 4b386526b4
commit c6d9b04cc3
5 changed files with 114 additions and 1 deletions

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@ -2001,6 +2001,10 @@ def mdspr2 : Flag<["-"], "mdspr2">, Group<m_Group>;
def mno_dspr2 : Flag<["-"], "mno-dspr2">, Group<m_Group>;
def msingle_float : Flag<["-"], "msingle-float">, Group<m_Group>;
def mdouble_float : Flag<["-"], "mdouble-float">, Group<m_Group>;
def mmadd4 : Flag<["-"], "mmadd4">, Group<m_Group>,
HelpText<"Enable the generation of 4-operand madd.s, madd.d and related instructions.">;
def mno_madd4 : Flag<["-"], "mno-madd4">, Group<m_Group>,
HelpText<"Disable the generation of 4-operand madd.s, madd.d and related instructions.">;
def mmsa : Flag<["-"], "mmsa">, Group<m_Group>,
HelpText<"Enable MSA ASE (MIPS only)">;
def mno_msa : Flag<["-"], "mno-msa">, Group<m_Group>,

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@ -7737,6 +7737,7 @@ class MipsTargetInfo : public TargetInfo {
NoDSP, DSP1, DSP2
} DspRev;
bool HasMSA;
bool DisableMadd4;
protected:
bool HasFP64;
@ -7747,7 +7748,7 @@ public:
: TargetInfo(Triple), IsMips16(false), IsMicromips(false),
IsNan2008(false), IsSingleFloat(false), IsNoABICalls(false),
CanUseBSDABICalls(false), FloatABI(HardFloat), DspRev(NoDSP),
HasMSA(false), HasFP64(false) {
HasMSA(false), DisableMadd4(false), HasFP64(false) {
TheCXXABI.set(TargetCXXABI::GenericMIPS);
setABI((getTriple().getArch() == llvm::Triple::mips ||
@ -7993,6 +7994,9 @@ public:
if (HasMSA)
Builder.defineMacro("__mips_msa", Twine(1));
if (DisableMadd4)
Builder.defineMacro("__mips_no_madd4", Twine(1));
Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
@ -8155,6 +8159,8 @@ public:
DspRev = std::max(DspRev, DSP2);
else if (Feature == "+msa")
HasMSA = true;
else if (Feature == "+nomadd4")
DisableMadd4 = true;
else if (Feature == "+fp64")
HasFP64 = true;
else if (Feature == "-fp64")

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@ -298,6 +298,13 @@ void mips::getMIPSTargetFeatures(const Driver &D, const llvm::Triple &Triple,
AddTargetFeature(Args, Features, options::OPT_mno_odd_spreg,
options::OPT_modd_spreg, "nooddspreg");
if (Arg *A = Args.getLastArg(options::OPT_mmadd4, options::OPT_mno_madd4)) {
if (A->getOption().matches(options::OPT_mmadd4))
Features.push_back("-nomadd4");
else
Features.push_back("+nomadd4");
}
}
mips::NanEncoding mips::getSupportedNanEncoding(StringRef &CPU) {

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@ -0,0 +1,86 @@
// RUN: %clang --target=mips64-unknown-linux -S -mmadd4 %s -o -| FileCheck %s -check-prefix=MADD4
// RUN: %clang --target=mips64-unknown-linux -S -mno-madd4 %s -o -| FileCheck %s -check-prefix=NOMADD4
// RUN: %clang --target=mips64-unknown-linux -S -mmadd4 -fno-honor-nans %s -o -| FileCheck %s -check-prefix=MADD4-NONAN
// RUN: %clang --target=mips64-unknown-linux -S -mno-madd4 -fno-honor-nans %s -o -| FileCheck %s -check-prefix=NOMADD4-NONAN
float madd_s (float f, float g, float h)
{
return (f * g) + h;
}
// MADD4: madd.s
// NOMADD4: mul.s
// NOMADD4: add.s
float msub_s (float f, float g, float h)
{
return (f * g) - h;
}
// MADD4: msub.s
// NOMADD4: mul.s
// NOMADD4: sub.s
double madd_d (double f, double g, double h)
{
return (f * g) + h;
}
// MADD4: madd.d
// NOMADD4: mul.d
// NOMADD4: add.d
double msub_d (double f, double g, double h)
{
return (f * g) - h;
}
// MADD4: msub.d
// NOMADD4: mul.d
// NOMADD4: sub.d
float nmadd_s (float f, float g, float h)
{
// FIXME: Zero has been explicitly placed to force generation of a positive
// zero in IR until pattern used to match this instruction is changed to
// comply with negative zero as well.
return 0-((f * g) + h);
}
// MADD4-NONAN: nmadd.s
// NOMADD4-NONAN: mul.s
// NOMADD4-NONAN: add.s
// NOMADD4-NONAN: sub.s
float nmsub_s (float f, float g, float h)
{
// FIXME: Zero has been explicitly placed to force generation of a positive
// zero in IR until pattern used to match this instruction is changed to
// comply with negative zero as well.
return 0-((f * g) - h);
}
// MADD4-NONAN: nmsub.s
// NOMADD4-NONAN: mul.s
// NOMADD4-NONAN: sub.s
// NOMADD4-NONAN: sub.s
double nmadd_d (double f, double g, double h)
{
// FIXME: Zero has been explicitly placed to force generation of a positive
// zero in IR until pattern used to match this instruction is changed to
// comply with negative zero as well.
return 0-((f * g) + h);
}
// MADD4-NONAN: nmadd.d
// NOMADD4-NONAN: mul.d
// NOMADD4-NONAN: add.d
// NOMADD4-NONAN: sub.d
double nmsub_d (double f, double g, double h)
{
// FIXME: Zero has been explicitly placed to force generation of a positive
// zero in IR until pattern used to match this instruction is changed to
// comply with negative zero as well.
return 0-((f * g) - h);
}
// MADD4-NONAN: nmsub.d
// NOMADD4-NONAN: mul.d
// NOMADD4-NONAN: sub.d
// NOMADD4-NONAN: sub.d

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@ -4664,6 +4664,16 @@
// RUN: | FileCheck -match-full-lines -check-prefix MIPS-MSA %s
// MIPS-MSA:#define __mips_msa 1
//
// RUN: %clang_cc1 -target-feature +nomadd4 \
// RUN: -E -dM -triple=mips-none-none < /dev/null \
// RUN: | FileCheck -match-full-lines -check-prefix MIPS-NOMADD4 %s
// MIPS-NOMADD4:#define __mips_no_madd4 1
//
// RUN: %clang_cc1 \
// RUN: -E -dM -triple=mips-none-none < /dev/null \
// RUN: | FileCheck -match-full-lines -check-prefix MIPS-MADD4 %s
// MIPS-MADD4-NOT:#define __mips_no_madd4 1
//
// RUN: %clang_cc1 -target-cpu mips32r3 -target-feature +nan2008 \
// RUN: -E -dM -triple=mips-none-none < /dev/null \
// RUN: | FileCheck -match-full-lines -check-prefix MIPS-NAN2008 %s