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[mips] [IAS] Do not generate redundant move when expanding lw/sw with symbol. 

Summary:
Even though there is no 2nd register operand in the "lw/sw $8, symbol" case, we still try to find one, 
and we end up with $0, which makes us generate an unnecessary "addu $8, $8, $0" (a.k.a. "move $8, $8").

We can avoid this by checking if the 2nd register operand is different from $0, before generating the addu.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8055

llvm-svn: 234406
This commit is contained in:
Toma Tabacu 2015-04-08 13:52:41 +00:00
parent 3a10e8012b
commit c6ce0749ad
2 changed files with 22 additions and 6 deletions
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14
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -2078,12 +2078,14 @@ void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
// Prepare TempInst for next instruction. // Prepare TempInst for next instruction.
TempInst.clear(); TempInst.clear();
// Add temp register to base. // Add temp register to base.
TempInst.setOpcode(Mips::ADDu); if (BaseRegNum != Mips::ZERO) {
TempInst.addOperand(MCOperand::CreateReg(TmpRegNum)); TempInst.setOpcode(Mips::ADDu);
TempInst.addOperand(MCOperand::CreateReg(TmpRegNum)); TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));
TempInst.addOperand(MCOperand::CreateReg(BaseRegNum)); TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));
Instructions.push_back(TempInst); TempInst.addOperand(MCOperand::CreateReg(BaseRegNum));
TempInst.clear(); Instructions.push_back(TempInst);
TempInst.clear();
}
// And finally, create original instruction with low part // And finally, create original instruction with low part
// of offset and new base. // of offset and new base.
TempInst.setOpcode(Inst.getOpcode()); TempInst.setOpcode(Inst.getOpcode());

14
llvm/test/MC/Mips/mips-expansions.s
View File

@ -50,6 +50,17 @@
# CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00] # CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
# CHECK: sw $10, 57920($1) # encoding: [0x40,0xe2,0x2a,0xac] # CHECK: sw $10, 57920($1) # encoding: [0x40,0xe2,0x2a,0xac]
# CHECK: lui $8, %hi(symbol) # encoding: [A,A,0x08,0x3c]
# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16
# CHECK-NOT: move $8, $8 # encoding: [0x21,0x40,0x00,0x01]
# CHECK: lw $8, %lo(symbol)($8) # encoding: [A,A,0x08,0x8d]
# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16
# CHECK: lui $1, %hi(symbol) # encoding: [A,A,0x01,0x3c]
# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16
# CHECK-NOT: move $1, $1 # encoding: [0x21,0x08,0x20,0x00]
# CHECK: sw $8, %lo(symbol)($1) # encoding: [A,A,0x28,0xac]
# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16
# CHECK: lui $1, %hi(symbol) # CHECK: lui $1, %hi(symbol)
# CHECK: ldc1 $f0, %lo(symbol)($1) # CHECK: ldc1 $f0, %lo(symbol)($1)
# CHECK: lui $1, %hi(symbol) # CHECK: lui $1, %hi(symbol)
@ -77,5 +88,8 @@
lw $t2, 655483($a0) lw $t2, 655483($a0)
sw $t2, 123456($t1) sw $t2, 123456($t1)
lw $8, symbol
sw $8, symbol
ldc1 $f0, symbol ldc1 $f0, symbol
sdc1 $f0, symbol sdc1 $f0, symbol