From c6a0338c0471a980dacc46f4e06637d30921ab76 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 26 Aug 2005 20:55:40 +0000 Subject: [PATCH] spell this right llvm-svn: 23099 --- llvm/lib/Target/Target.td | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/Target.td b/llvm/lib/Target/Target.td index 01ee17ef7cb4..fc79f592047f 100644 --- a/llvm/lib/Target/Target.td +++ b/llvm/lib/Target/Target.td @@ -143,7 +143,7 @@ class Instruction { bit isCommutable = 0; // Is this 3 operand instruction commutable? bit isTerminator = 0; // Is this part of the terminator for a basic block? bit hasDelaySlot = 0; // Does this instruction have an delay slot? - bit usesCustomDAGSChedInserter = 0; // Pseudo instr needing special help. + bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help. } diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index b3bb46db9923..bd02ccdcef02 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -250,7 +250,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isCommutable = R->getValueAsBit("isCommutable"); isTerminator = R->getValueAsBit("isTerminator"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); - usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSChedInserter"); + usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter"); hasVariableNumberOfOperands = false; try {