forked from OSchip/llvm-project
[X86] As per suggestion from Craig Topper and Hal Finkel, override
TargetInstrInfo::findCommutedOpIndices to enable VFMA*231 commutation, rather than abusing commuteInstruction. Thanks very much for the suggestion guys! llvm-svn: 205489
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@ -2457,52 +2457,48 @@ X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
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NewMI = false;
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}
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MI->setDesc(get(Opc));
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return TargetInstrInfo::commuteInstruction(MI, NewMI);
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}
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case X86::VFMADDPDr231r:
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case X86::VFMADDPSr231r:
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case X86::VFMADDSDr231r:
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case X86::VFMADDSSr231r:
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case X86::VFMSUBPDr231r:
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case X86::VFMSUBPSr231r:
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case X86::VFMSUBSDr231r:
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case X86::VFMSUBSSr231r:
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case X86::VFNMADDPDr231r:
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case X86::VFNMADDPSr231r:
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case X86::VFNMADDSDr231r:
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case X86::VFNMADDSSr231r:
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case X86::VFNMSUBPDr231r:
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case X86::VFNMSUBPSr231r:
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case X86::VFNMSUBSDr231r:
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case X86::VFNMSUBSSr231r:
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case X86::VFMADDPDr231rY:
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case X86::VFMADDPSr231rY:
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case X86::VFMSUBPDr231rY:
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case X86::VFMSUBPSr231rY:
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case X86::VFNMADDPDr231rY:
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case X86::VFNMADDPSr231rY:
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case X86::VFNMSUBPDr231rY:
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case X86::VFNMSUBPSr231rY: {
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MachineOperand &O2 = MI->getOperand(2);
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MachineOperand &O3 = MI->getOperand(3);
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assert(O2.isReg() && O3.isReg() &&
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"Can't commute memory operands.");
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unsigned O2Reg = O2.getReg();
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unsigned O2SubReg = O2.getSubReg();
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bool O2IsKill = O2.isKill();
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O2.setReg(O3.getReg());
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O2.setSubReg(O3.getSubReg());
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O2.setIsKill(O3.isKill());
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O3.setReg(O2Reg);
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O3.setSubReg(O2SubReg);
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O3.setIsKill(O2IsKill);
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return MI;
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// Fallthrough intended.
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}
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default:
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return TargetInstrInfo::commuteInstruction(MI, NewMI);
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}
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}
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bool X86InstrInfo::findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1,
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unsigned &SrcOpIdx2) const {
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switch (MI->getOpcode()) {
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case X86::VFMADDPDr231r:
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case X86::VFMADDPSr231r:
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case X86::VFMADDSDr231r:
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case X86::VFMADDSSr231r:
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case X86::VFMSUBPDr231r:
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case X86::VFMSUBPSr231r:
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case X86::VFMSUBSDr231r:
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case X86::VFMSUBSSr231r:
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case X86::VFNMADDPDr231r:
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case X86::VFNMADDPSr231r:
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case X86::VFNMADDSDr231r:
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case X86::VFNMADDSSr231r:
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case X86::VFNMSUBPDr231r:
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case X86::VFNMSUBPSr231r:
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case X86::VFNMSUBSDr231r:
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case X86::VFNMSUBSSr231r:
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case X86::VFMADDPDr231rY:
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case X86::VFMADDPSr231rY:
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case X86::VFMSUBPDr231rY:
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case X86::VFMSUBPSr231rY:
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case X86::VFNMADDPDr231rY:
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case X86::VFNMADDPSr231rY:
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case X86::VFNMSUBPDr231rY:
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case X86::VFNMSUBPSr231rY:
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SrcOpIdx1 = 2;
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SrcOpIdx2 = 3;
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return true;
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default:
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return TargetInstrInfo::findCommutedOpIndices(MI, SrcOpIdx1, SrcOpIdx2);
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}
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}
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static X86::CondCode getCondFromBranchOpc(unsigned BrOpc) {
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switch (BrOpc) {
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default: return X86::COND_INVALID;
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@ -229,6 +229,9 @@ public:
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///
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MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI) const override;
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bool findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1,
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unsigned &SrcOpIdx2) const override;
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// Branch analysis.
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bool isUnpredicatedTerminator(const MachineInstr* MI) const override;
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bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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