forked from OSchip/llvm-project
Add support for _mm_cmp{cc}_ss and _mm_cmp{cc}_ps intrinsics
llvm-svn: 27256
This commit is contained in:
Evan Cheng
parent
593310016d
commit
c58ef7deeb
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@ -63,114 +63,12 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// Comparison ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_cmpeq_ss : GCCBuiltin<"__builtin_ia32_cmpeqss">,
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def int_x86_sse_cmp_ss :
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpeq_ps : GCCBuiltin<"__builtin_ia32_cmpeqps">,
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llvm_v4f32_ty, llvm_sbyte_ty], [InstrNoMem]>;
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def int_x86_sse_cmp_ps :
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmplt_ss : GCCBuiltin<"__builtin_ia32_cmpltss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmplt_ps : GCCBuiltin<"__builtin_ia32_cmpltps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmple_ss : GCCBuiltin<"__builtin_ia32_cmpless">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmple_ps : GCCBuiltin<"__builtin_ia32_cmpleps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgt_ss : GCCBuiltin<"__builtin_ia32_cmpgtss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgt_ps : GCCBuiltin<"__builtin_ia32_cmpgtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpge_ss : GCCBuiltin<"__builtin_ia32_cmpgess">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpge_ps : GCCBuiltin<"__builtin_ia32_cmpgeps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpneq_ss : GCCBuiltin<"__builtin_ia32_cmpneqss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpneq_ps : GCCBuiltin<"__builtin_ia32_cmpneqps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnlt_ss : GCCBuiltin<"__builtin_ia32_cmpnltss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnlt_ps : GCCBuiltin<"__builtin_ia32_cmpnltps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnle_ss : GCCBuiltin<"__builtin_ia32_cmpnless">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnle_ps : GCCBuiltin<"__builtin_ia32_cmpnleps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngt_ss : GCCBuiltin<"__builtin_ia32_cmpngtss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngt_ps : GCCBuiltin<"__builtin_ia32_cmpngtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnge_ss : GCCBuiltin<"__builtin_ia32_cmpngess">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnge_ps : GCCBuiltin<"__builtin_ia32_cmpngeps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpord_ss : GCCBuiltin<"__builtin_ia32_cmpordss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpord_ps : GCCBuiltin<"__builtin_ia32_cmpordps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpunord_ss : GCCBuiltin<"__builtin_ia32_cmpunordss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpunord_ps : GCCBuiltin<"__builtin_ia32_cmpunordps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comile_ss : GCCBuiltin<"__Builtin_ia32_comile">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomile_ss : GCCBuiltin<"__Builtin_ia32_ucomile">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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llvm_v4f32_ty, llvm_sbyte_ty], [InstrNoMem]>;
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}
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@ -501,7 +501,8 @@ def CVTSS2SDrm: I<0x5A, MRMSrcMem, (ops FR64:$dst, f32mem:$src),
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let isTwoAddress = 1 in {
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def CMPSSrr : SSI<0xC2, MRMSrcReg,
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(ops FR32:$dst, FR32:$src1, FR32:$src, SSECC:$cc),
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"cmp${cc}ss {$src, $dst|$dst, $src}", []>;
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"cmp${cc}ss {$src, $dst|$dst, $src}",
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[]>;
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def CMPSSrm : SSI<0xC2, MRMSrcMem,
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(ops FR32:$dst, FR32:$src1, f32mem:$src, SSECC:$cc),
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"cmp${cc}ss {$src, $dst|$dst, $src}", []>;
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@ -526,6 +527,27 @@ def UCOMISDrm: PDI<0x2E, MRMSrcMem, (ops FR64:$src1, f64mem:$src2),
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"ucomisd {$src2, $src1|$src1, $src2}",
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[(X86cmp FR64:$src1, (loadf64 addr:$src2))]>;
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// Aliases to match intrinsics which expect XMM operand(s).
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let isTwoAddress = 1 in {
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def Int_CMPSSrr : SSI<0xC2, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}ss {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def Int_CMPSSrm : SSI<0xC2, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, f32mem:$src, SSECC:$cc),
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"cmp${cc}ss {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1,
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(load addr:$src), imm:$cc))]>;
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def Int_CMPSDrr : SDI<0xC2, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}sd {$src, $dst|$dst, $src}", []>;
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def Int_CMPSDrm : SDI<0xC2, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, f64mem:$src, SSECC:$cc),
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"cmp${cc}sd {$src, $dst|$dst, $src}", []>;
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}
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// Aliases of packed instructions for scalar use. These all have names that
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// start with 'Fs'.
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@ -936,17 +958,21 @@ def ANDNPDrm : PDI<0x55, MRMSrcMem, (ops VR128:$dst, VR128:$src1,f128mem:$src2),
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let isTwoAddress = 1 in {
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def CMPPSrr : PSI<0xC2, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}ps {$src, $dst|$dst, $src}", []>;
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}ps {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def CMPPSrm : PSI<0xC2, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}ps {$src, $dst|$dst, $src}", []>;
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}ps {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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(load addr:$src), imm:$cc))]>;
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def CMPPDrr : PDI<0xC2, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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def CMPPDrm : PDI<0xC2, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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}
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// Shuffle and unpack instructions
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