forked from OSchip/llvm-project
Until we have a dag combiner, promote using zextload's instead of extloads.
This gives the optimizer a bit of information about the top-part of the value. llvm-svn: 21205
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@ -1355,7 +1355,8 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
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case ISD::LOAD:
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
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Result = DAG.getNode(ISD::EXTLOAD, NVT, Tmp1, Tmp2, VT);
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// FIXME: When the DAG combiner exists, change this to use EXTLOAD!
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Result = DAG.getNode(ISD::ZEXTLOAD, NVT, Tmp1, Tmp2, VT);
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// Remember that we legalized the chain.
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AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
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