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Inform the dag combiner that the predicate compares only return a low bit. 

llvm-svn: 27359
This commit is contained in:
Chris Lattner 2006-04-02 06:26:07 +00:00
parent 6c1321ca3f
commit c5287c0ece
2 changed files with 39 additions and 1 deletions
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35
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -760,7 +760,7 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(PPCISD::VPERM, V1.getValueType(), V1, V2, VPermMask);
}
case ISD::INTRINSIC_WO_CHAIN: {
unsigned IntNo=cast<ConstantSDNode>(Op.getOperand(0))->getValue();
unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getValue();
// If this is a lowered altivec predicate compare, CompareOpc is set to the
// opcode number of the comparison.
@ -1409,6 +1409,39 @@ SDOperand PPCTargetLowering::PerformDAGCombine(SDNode *N,
return SDOperand();
}
void PPCTargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op,
uint64_t Mask,
uint64_t &KnownZero,
uint64_t &KnownOne,
unsigned Depth) const {
KnownZero = 0;
KnownOne = 0;
switch (Op.getOpcode()) {
default: break;
case ISD::INTRINSIC_WO_CHAIN: {
switch (cast<ConstantSDNode>(Op.getOperand(0))->getValue()) {
default: break;
case Intrinsic::ppc_altivec_vcmpbfp_p:
case Intrinsic::ppc_altivec_vcmpeqfp_p:
case Intrinsic::ppc_altivec_vcmpequb_p:
case Intrinsic::ppc_altivec_vcmpequh_p:
case Intrinsic::ppc_altivec_vcmpequw_p:
case Intrinsic::ppc_altivec_vcmpgefp_p:
case Intrinsic::ppc_altivec_vcmpgtfp_p:
case Intrinsic::ppc_altivec_vcmpgtsb_p:
case Intrinsic::ppc_altivec_vcmpgtsh_p:
case Intrinsic::ppc_altivec_vcmpgtsw_p:
case Intrinsic::ppc_altivec_vcmpgtub_p:
case Intrinsic::ppc_altivec_vcmpgtuh_p:
case Intrinsic::ppc_altivec_vcmpgtuw_p:
KnownZero = ~1U; // All bits but the low one are known to be zero.
break;
}
}
}
}
/// getConstraintType - Given a constraint letter, return the type of
/// constraint it is for this target.
PPCTargetLowering::ConstraintType

5
llvm/lib/Target/PowerPC/PPCISelLowering.h
View File

@ -133,6 +133,11 @@ namespace llvm {
virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
virtual void computeMaskedBitsForTargetNode(const SDOperand Op,
uint64_t Mask,
uint64_t &KnownZero,
uint64_t &KnownOne,
unsigned Depth = 0) const;
/// LowerArguments - This hook must be implemented to indicate how we should
/// lower the arguments for the specified function, into the specified DAG.
virtual std::vector<SDOperand>