diff --git a/llvm/test/tools/llvm-mca/X86/Broadwell/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-rdrand.s new file mode 100644 index 000000000000..42e59996bbef --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-rdrand.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 5 9 1.00 U rdrandw %ax +# CHECK-NEXT: 5 9 1.00 U rdrandl %eax +# CHECK-NEXT: 5 9 1.00 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - BWDivider +# CHECK-NEXT: [1] - BWFPDivider +# CHECK-NEXT: [2] - BWPort0 +# CHECK-NEXT: [3] - BWPort1 +# CHECK-NEXT: [4] - BWPort2 +# CHECK-NEXT: [5] - BWPort3 +# CHECK-NEXT: [6] - BWPort4 +# CHECK-NEXT: [7] - BWPort5 +# CHECK-NEXT: [8] - BWPort6 +# CHECK-NEXT: [9] - BWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 3.75 2.25 1.50 1.50 - 2.25 3.75 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 1.25 0.75 0.50 0.50 - 0.75 1.25 - rdrandw %ax +# CHECK-NEXT: - - 1.25 0.75 0.50 0.50 - 0.75 1.25 - rdrandl %eax +# CHECK-NEXT: - - 1.25 0.75 0.50 0.50 - 0.75 1.25 - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/Broadwell/resources-rdseed.s b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-rdseed.s new file mode 100644 index 000000000000..33c38d953cc3 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-rdseed.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s + +rdseed %ax +rdseed %eax +rdseed %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdseedw %ax +# CHECK-NEXT: 1 100 0.25 U rdseedl %eax +# CHECK-NEXT: 1 100 0.25 U rdseedq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - BWDivider +# CHECK-NEXT: [1] - BWFPDivider +# CHECK-NEXT: [2] - BWPort0 +# CHECK-NEXT: [3] - BWPort1 +# CHECK-NEXT: [4] - BWPort2 +# CHECK-NEXT: [5] - BWPort3 +# CHECK-NEXT: [6] - BWPort4 +# CHECK-NEXT: [7] - BWPort5 +# CHECK-NEXT: [8] - BWPort6 +# CHECK-NEXT: [9] - BWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 0.75 0.75 - - - 0.75 0.75 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedw %ax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedl %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedq %rax diff --git a/llvm/test/tools/llvm-mca/X86/Generic/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/Generic/resources-rdrand.s new file mode 100644 index 000000000000..c7a214932661 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Generic/resources-rdrand.s @@ -0,0 +1,39 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 U rdrandw %ax +# CHECK-NEXT: 1 100 0.33 U rdrandl %eax +# CHECK-NEXT: 1 100 0.33 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandw %ax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandl %eax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/Generic/resources-rdseed.s b/llvm/test/tools/llvm-mca/X86/Generic/resources-rdseed.s new file mode 100644 index 000000000000..c97d4192b323 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Generic/resources-rdseed.s @@ -0,0 +1,39 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +rdseed %ax +rdseed %eax +rdseed %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 U rdseedw %ax +# CHECK-NEXT: 1 100 0.33 U rdseedl %eax +# CHECK-NEXT: 1 100 0.33 U rdseedq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdseedw %ax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdseedl %eax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdseedq %rax diff --git a/llvm/test/tools/llvm-mca/X86/Haswell/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/Haswell/resources-rdrand.s new file mode 100644 index 000000000000..08876f311277 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Haswell/resources-rdrand.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 17 1 5.33 U rdrandw %ax +# CHECK-NEXT: 17 1 5.33 U rdrandl %eax +# CHECK-NEXT: 17 1 5.33 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - HWDivider +# CHECK-NEXT: [1] - HWFPDivider +# CHECK-NEXT: [2] - HWPort0 +# CHECK-NEXT: [3] - HWPort1 +# CHECK-NEXT: [4] - HWPort2 +# CHECK-NEXT: [5] - HWPort3 +# CHECK-NEXT: [6] - HWPort4 +# CHECK-NEXT: [7] - HWPort5 +# CHECK-NEXT: [8] - HWPort6 +# CHECK-NEXT: [9] - HWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 16.00 16.00 1.50 1.50 - 16.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 5.33 5.33 0.50 0.50 - 5.33 - - rdrandw %ax +# CHECK-NEXT: - - 5.33 5.33 0.50 0.50 - 5.33 - - rdrandl %eax +# CHECK-NEXT: - - 5.33 5.33 0.50 0.50 - 5.33 - - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/SLM/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/SLM/resources-rdrand.s new file mode 100644 index 000000000000..360544866707 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SLM/resources-rdrand.s @@ -0,0 +1,39 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=slm -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 1.00 U rdrandw %ax +# CHECK-NEXT: 1 100 1.00 U rdrandl %eax +# CHECK-NEXT: 1 100 1.00 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SLMDivider +# CHECK-NEXT: [1] - SLMFPDivider +# CHECK-NEXT: [2] - SLMFPMultiplier +# CHECK-NEXT: [3] - SLM_FPC_RSV0 +# CHECK-NEXT: [4] - SLM_FPC_RSV1 +# CHECK-NEXT: [5] - SLM_IEC_RSV0 +# CHECK-NEXT: [6] - SLM_IEC_RSV1 +# CHECK-NEXT: [7] - SLM_MEC_RSV + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] +# CHECK-NEXT: - - - 3.00 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - rdrandw %ax +# CHECK-NEXT: - - - 1.00 - - - - rdrandl %eax +# CHECK-NEXT: - - - 1.00 - - - - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-rdrand.s new file mode 100644 index 000000000000..5b0838907ba5 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-rdrand.s @@ -0,0 +1,39 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 U rdrandw %ax +# CHECK-NEXT: 1 100 0.33 U rdrandl %eax +# CHECK-NEXT: 1 100 0.33 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandw %ax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandl %eax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-rdrand.s new file mode 100644 index 000000000000..3c77caffa357 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-rdrand.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdrandw %ax +# CHECK-NEXT: 1 100 0.25 U rdrandl %eax +# CHECK-NEXT: 1 100 0.25 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKLDivider +# CHECK-NEXT: [1] - SKLFPDivider +# CHECK-NEXT: [2] - SKLPort0 +# CHECK-NEXT: [3] - SKLPort1 +# CHECK-NEXT: [4] - SKLPort2 +# CHECK-NEXT: [5] - SKLPort3 +# CHECK-NEXT: [6] - SKLPort4 +# CHECK-NEXT: [7] - SKLPort5 +# CHECK-NEXT: [8] - SKLPort6 +# CHECK-NEXT: [9] - SKLPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 0.75 0.75 - - - 0.75 0.75 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdrandw %ax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdrandl %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-rdseed.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-rdseed.s new file mode 100644 index 000000000000..648886ee7b09 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-rdseed.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s + +rdseed %ax +rdseed %eax +rdseed %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdseedw %ax +# CHECK-NEXT: 1 100 0.25 U rdseedl %eax +# CHECK-NEXT: 1 100 0.25 U rdseedq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKLDivider +# CHECK-NEXT: [1] - SKLFPDivider +# CHECK-NEXT: [2] - SKLPort0 +# CHECK-NEXT: [3] - SKLPort1 +# CHECK-NEXT: [4] - SKLPort2 +# CHECK-NEXT: [5] - SKLPort3 +# CHECK-NEXT: [6] - SKLPort4 +# CHECK-NEXT: [7] - SKLPort5 +# CHECK-NEXT: [8] - SKLPort6 +# CHECK-NEXT: [9] - SKLPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 0.75 0.75 - - - 0.75 0.75 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedw %ax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedl %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedq %rax diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-rdrand.s new file mode 100644 index 000000000000..b6225d1a5d8f --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-rdrand.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdrandw %ax +# CHECK-NEXT: 1 100 0.25 U rdrandl %eax +# CHECK-NEXT: 1 100 0.25 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 0.75 0.75 - - - 0.75 0.75 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdrandw %ax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdrandl %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-rdseed.s b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-rdseed.s new file mode 100644 index 000000000000..b6209ce48d1f --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-rdseed.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +rdseed %ax +rdseed %eax +rdseed %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdseedw %ax +# CHECK-NEXT: 1 100 0.25 U rdseedl %eax +# CHECK-NEXT: 1 100 0.25 U rdseedq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 0.75 0.75 - - - 0.75 0.75 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedw %ax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedl %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdseedq %rax diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-rdrand.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-rdrand.s new file mode 100644 index 000000000000..07d717be2533 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-rdrand.s @@ -0,0 +1,43 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdrandw %ax +# CHECK-NEXT: 1 100 0.25 U rdrandl %eax +# CHECK-NEXT: 1 100 0.25 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - rdrandw %ax +# CHECK-NEXT: - - - - - - - - - - - - rdrandl %eax +# CHECK-NEXT: - - - - - - - - - - - - rdrandq %rax diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-rdseed.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-rdseed.s new file mode 100644 index 000000000000..3ac9de7bf1b1 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-rdseed.s @@ -0,0 +1,43 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +rdseed %ax +rdseed %eax +rdseed %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdseedw %ax +# CHECK-NEXT: 1 100 0.25 U rdseedl %eax +# CHECK-NEXT: 1 100 0.25 U rdseedq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - rdseedw %ax +# CHECK-NEXT: - - - - - - - - - - - - rdseedl %eax +# CHECK-NEXT: - - - - - - - - - - - - rdseedq %rax