forked from OSchip/llvm-project
When rewriting frame instructions, emit the appropriate small-immediate
instruction when possible. llvm-svn: 25938
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2bcfc52af6
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c408558638
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@ -467,9 +467,11 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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// factor out the amount the callee already popped.
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unsigned CalleeAmt = Old->getOperand(1).getImmedValue();
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Amount -= CalleeAmt;
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if (Amount)
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New = BuildMI(X86::ADD32ri, 1, X86::ESP,
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if (Amount) {
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unsigned Opc = Amount < 128 ? X86::ADD32ri8 : X86::ADD32ri;
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New = BuildMI(Opc, 1, X86::ESP,
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MachineOperand::UseAndDef).addZImm(Amount);
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}
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}
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// Replace the pseudo instruction with a new instruction...
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@ -480,8 +482,9 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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// something off the stack pointer, add it back. We do this until we have
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// more advanced stack pointer tracking ability.
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if (unsigned CalleeAmt = I->getOperand(1).getImmedValue()) {
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unsigned Opc = CalleeAmt < 128 ? X86::SUB32ri8 : X86::SUB32ri;
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MachineInstr *New =
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BuildMI(X86::SUB32ri, 1, X86::ESP,
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BuildMI(Opc, 1, X86::ESP,
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MachineOperand::UseAndDef).addZImm(CalleeAmt);
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MBB.insert(I, New);
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}
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@ -541,8 +544,8 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
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int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexBegin())+4;
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if (NumBytes) { // adjust stack pointer: ESP -= numbytes
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MI= BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
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.addZImm(NumBytes);
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unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
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MI = BuildMI(Opc, 1, X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
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MBB.insert(MBBI, MI);
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}
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@ -578,8 +581,8 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
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if (NumBytes) {
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// adjust stack pointer: ESP -= numbytes
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MI= BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
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.addZImm(NumBytes);
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unsigned Opc = NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
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MI= BuildMI(Opc, 1, X86::ESP, MachineOperand::UseAndDef).addImm(NumBytes);
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MBB.insert(MBBI, MI);
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}
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}
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@ -619,11 +622,13 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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// instruction, merge the two instructions.
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if (MBBI != MBB.begin()) {
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MachineBasicBlock::iterator PI = prior(MBBI);
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if (PI->getOpcode() == X86::ADD32ri &&
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if ((PI->getOpcode() == X86::ADD32ri ||
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PI->getOpcode() == X86::ADD32ri8) &&
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PI->getOperand(0).getReg() == X86::ESP) {
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NumBytes += PI->getOperand(1).getImmedValue();
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MBB.erase(PI);
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} else if (PI->getOpcode() == X86::SUB32ri &&
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} else if ((PI->getOpcode() == X86::SUB32ri ||
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PI->getOpcode() == X86::SUB32ri8) &&
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PI->getOperand(0).getReg() == X86::ESP) {
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NumBytes -= PI->getOperand(1).getImmedValue();
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MBB.erase(PI);
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@ -633,12 +638,15 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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}
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}
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if (NumBytes > 0)
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BuildMI(MBB, MBBI, X86::ADD32ri, 2)
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if (NumBytes > 0) {
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unsigned Opc = NumBytes < 128 ? X86::ADD32ri8 : X86::ADD32ri;
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BuildMI(MBB, MBBI, Opc, 2)
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.addReg(X86::ESP, MachineOperand::UseAndDef).addZImm(NumBytes);
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else if ((int)NumBytes < 0)
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BuildMI(MBB, MBBI, X86::SUB32ri, 2)
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} else if ((int)NumBytes < 0) {
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unsigned Opc = -NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
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BuildMI(MBB, MBBI, Opc, 2)
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.addReg(X86::ESP, MachineOperand::UseAndDef).addZImm(-NumBytes);
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}
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}
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}
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}
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