forked from OSchip/llvm-project
[mlir] Convert std.and/std.or ops to spv.LogicalAnd/spv.LogicalOr
The conversion from std.and/std.or to spv.LogicalAnd/spv.LogicalOr is only valid for boolean (i1) types. Modify BinaryOpPattern in StandardToSPIRV.td to allow limiting the type of the operands for which the pattern is applied. Differential Revision: https://reviews.llvm.org/D71881
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@ -16,15 +16,17 @@
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include "mlir/Dialect/StandardOps/Ops.td"
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include "mlir/Dialect/SPIRV/SPIRVOps.td"
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class BinaryOpPattern<Op src, Op tgt> :
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Pat<(src SPV_ScalarOrVector:$l, SPV_ScalarOrVector:$r),
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class BinaryOpPattern<Type type, Op src, Op tgt> :
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Pat<(src SPV_ScalarOrVectorOf<type>:$l, SPV_ScalarOrVectorOf<type>:$r),
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(tgt $l, $r)>;
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def : BinaryOpPattern<AddFOp, SPV_FAddOp>;
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def : BinaryOpPattern<DivFOp, SPV_FDivOp>;
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def : BinaryOpPattern<MulFOp, SPV_FMulOp>;
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def : BinaryOpPattern<RemFOp, SPV_FRemOp>;
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def : BinaryOpPattern<SubFOp, SPV_FSubOp>;
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def : BinaryOpPattern<SPV_Bool, AndOp, SPV_LogicalAndOp>;
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def : BinaryOpPattern<SPV_Bool, OrOp, SPV_LogicalOrOp>;
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def : BinaryOpPattern<SPV_Float, AddFOp, SPV_FAddOp>;
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def : BinaryOpPattern<SPV_Float, DivFOp, SPV_FDivOp>;
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def : BinaryOpPattern<SPV_Float, MulFOp, SPV_FMulOp>;
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def : BinaryOpPattern<SPV_Float, RemFOp, SPV_FRemOp>;
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def : BinaryOpPattern<SPV_Float, SubFOp, SPV_FSubOp>;
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// Constant Op
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// TODO(ravishankarm): Handle lowering other constant types.
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@ -134,6 +134,46 @@ func @constant() {
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return
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}
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//===----------------------------------------------------------------------===//
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// std logical binary operations
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @logical_scalar
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func @logical_scalar(%arg0 : i1, %arg1 : i1) {
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// CHECK: spv.LogicalAnd
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%0 = and %arg0, %arg1 : i1
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// CHECK: spv.LogicalOr
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%1 = or %arg0, %arg1 : i1
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return
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}
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// CHECK-LABEL: @logical_vector
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func @logical_vector(%arg0 : vector<4xi1>, %arg1 : vector<4xi1>) {
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// CHECK: spv.LogicalAnd
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%0 = and %arg0, %arg1 : vector<4xi1>
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// CHECK: spv.LogicalOr
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%1 = or %arg0, %arg1 : vector<4xi1>
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return
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}
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// CHECK-LABEL: @logical_scalar_fail
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func @logical_scalar_fail(%arg0 : i32, %arg1 : i32) {
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// CHECK-NOT: spv.LogicalAnd
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%0 = and %arg0, %arg1 : i32
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// CHECK-NOT: spv.LogicalOr
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%1 = or %arg0, %arg1 : i32
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return
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}
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// CHECK-LABEL: @logical_vector_fail
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func @logical_vector_fail(%arg0 : vector<4xi32>, %arg1 : vector<4xi32>) {
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// CHECK-NOT: spv.LogicalAnd
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%0 = and %arg0, %arg1 : vector<4xi32>
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// CHECK-NOT: spv.LogicalOr
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%1 = or %arg0, %arg1 : vector<4xi32>
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return
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}
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//===----------------------------------------------------------------------===//
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// std.select
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//===----------------------------------------------------------------------===//
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