forked from OSchip/llvm-project
AArch64: be more careful resorting to inefficient addressing for weak vars.
If an otherwise weak var is actually defined in this unit, it can't be undefined at runtime so we can use normal global variable sequences (ADRP/ADD) to access it. llvm-svn: 176259
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@ -1852,11 +1852,10 @@ AArch64TargetLowering::LowerGlobalAddressELF(SDValue Op,
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const GlobalValue *GV = GN->getGlobal();
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unsigned Alignment = GV->getAlignment();
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Reloc::Model RelocM = getTargetMachine().getRelocationModel();
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if (GV->isWeakForLinker() && RelocM == Reloc::Static) {
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// Weak symbols can't use ADRP/ADD pair since they should evaluate to
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// zero when undefined. In PIC mode the GOT can take care of this, but in
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// absolute mode we use a constant pool load.
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if (GV->isWeakForLinker() && GV->isDeclaration() && RelocM == Reloc::Static) {
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// Weak undefined symbols can't use ADRP/ADD pair since they should evaluate
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// to zero when they remain undefined. In PIC mode the GOT can take care of
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// this, but in absolute mode we use a constant pool load.
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SDValue PoolAddr;
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PoolAddr = DAG.getNode(AArch64ISD::WrapperSmall, dl, PtrVT,
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DAG.getTargetConstantPool(GV, PtrVT, 0, 0,
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@ -24,4 +24,12 @@ define i32* @bar() {
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; CHECK: ldr [[BASE:x[0-9]+]], [{{x[0-9]+}}, #:lo12:.LCPI1_0]
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; CHECK: add x0, [[BASE]], #20
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ret i32* %addr
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}
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@defined_weak_var = internal unnamed_addr global i32 0
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define i32* @wibble() {
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ret i32* @defined_weak_var
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; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
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; CHECK: add x0, [[BASE]], #:lo12:defined_weak_var
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}
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