forked from OSchip/llvm-project
add a multiclass for cmov's, but don't start using it yet.
llvm-svn: 115692
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@ -12,7 +12,46 @@
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//
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//===----------------------------------------------------------------------===//
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// FIXME: Someone please sprinkle some defm's in here!
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// SetCC instructions.
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multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
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let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
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isCommutable = 1 in {
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def rr16 : I<opc, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
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!strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
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[(set GR16:$dst,
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(X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))]>,
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TB, OpSize;
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def rr32 : I<opc, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
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!strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
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[(set GR32:$dst,
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(X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))]>,
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TB;
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def rr64 :RI<opc, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
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!strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
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[(set GR64:$dst,
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(X86cmov GR64:$src1, GR64:$src2, CondNode, EFLAGS))]>,
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TB;
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}
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let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst"in {
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def rm16 : I<opc, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2),
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!strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
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[(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2),
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CondNode, EFLAGS))]>, TB, OpSize;
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def rm32 : I<opc, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2),
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!strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
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[(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2),
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CondNode, EFLAGS))]>, TB;
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def rm64 :RI<opc, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
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!strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
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[(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2),
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CondNode, EFLAGS))]>, TB;
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} // Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst"
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} // end multiclass
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//defm CMOVBE : CMOV<0x46, "cmovbe", X86_COND_BE>;
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let Constraints = "$src1 = $dst" in {
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